ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 55
ST20-C1
Manufacturer Part Number
ST20-C1
Description
Instruction Set Reference Manual
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST20-C1.pdf
(205 pages)
- Current page: 55 of 205
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is the address of the control block ORed with the type flag ExceptionProcessType in
bit 0.
The code to perform a DMA to transmit param_count bytes to or from param_buffer
using exception level except_level where the DMA registers periph_count ,
periph_buffer and periph_start are in a block at peripheral and the interrupt handler is
at except_control_block would be similar to the following:
When the interrupt handler starts execution the peripheral job will be complete.
4.12 Status register
The status register may be manipulated using the instructions listed in Table 4.14.
In each of these instructions, Areg holds a bit mask. statusclr copies the initial status
register into the Areg and clears the bits of the status register that are set in the initial
Areg. For example, to clear the bit bit_number :
statusset is similar, but sets the bits of the status register that are set in the initial
Areg. statustst returns in the Areg the status bits masked by the initial Areg. The
Breg and Creg are unaffected.
The status register is described in section 3.3.2.
ld except_control_block; ldc ExceptionProcessType; or;
ld ExceptionBase; stnl except_level;
ld param_count; ld peripheral; stnl periph_count;
ld param_buffer; arot; stnl periph_buffer;
ldc start_value; arot; stnl periph_start;
ldc bit_number; bitmask; statusclr
statusclr
statusset
statustst
Mnemonic
Table 4.14 Semaphore instructions
clear bits in status register
set bits in status register
test status register
Name
4 Using ST20-C1 instructions
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