ST72321B STMICROELECTRONICS [STMicroelectronics], ST72321B Datasheet - Page 141
ST72321B
Manufacturer Part Number
ST72321B
Description
64/44-pin 8-bit MCU with 32 to 60K Flash/ROM, ADC, five timers, SPI, SCI, I2C interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST72321B.pdf
(187 pages)
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OPERATING CONDITIONS (Cont’d)
12.3.2 Operating Conditions with Low Voltage Detector (LVD)
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, tested in production for ROM devices only.
2. If the medium or low thresholds are selected, the detection may occur outside the specified operating voltage range.
Below 3.8V, device operation is not guaranteed.
3. Data based on characterization results, not tested in production.
3. When Vt
V
12.3.3 Auxiliary Voltage Detector (AVD) Thresholds
Subject to general operating conditions for V
1. Data based on characterization results, tested in production for ROM devices only.
12.3.4 External Voltage Detector (EVD) Thresholds
Subject to general operating conditions for V
1. Data based on characterization results, not tested in production.
V
V
V
Vt
t
V
V
V
∆V
V
V
V
IT+(LVD)
g(VDD)
Symbol
Symbol
Symbol
IT+(LVD)
IT-(LVD)
hys(LVD)
IT+(AVD)
IT-(AVD)
hys(AVD)
IT+(EVD)
IT-(EVD)
hys(EVD)
POR
IT-
threshold.
POR
Reset release threshold
(V
Reset generation threshold
(V
LVD voltage threshold hysteresis V
V
V
ed) by LVD
1⇒0 AVDF flag toggle threshold
(V
0⇒1 AVDF flag toggle threshold
(V
AVD voltage threshold hysteresis
Voltage drop between AVD flag set
and LVD reset activated
1⇒0 AVDF flag toggle threshold
(V
0⇒1 AVDF flag toggle threshold
(V
EVD voltage threshold hysteresis
DD
DD
DD
DD
DD
DD
DD
DD
is faster than 100 µs/V, the Reset signal is released after a delay of max. 42µs after V
rise time
glitches filtered (not detect-
rise)
rise)
rise)
fall)
fall)
fall)
1)
1)
Parameter
3)
Parameter
Parameter
3)2)
VD level = High in option byte
VD level = Med. in option byte
VD level = Low in option byte
VD level = High in option byte
VD level = Med. in option byte
VD level = Low in option byte
LVD enabled
IT+(LVD)
VD level = High in option byte
VD level = Med. in option byte
VD level = Low in option byte
VD level = High in option byte
VD level = Med. in option byte
VD level = Low in option byte
V
V
V
DD
DD
DD
IT+(AVD)
IT-(AVD)
IT+(EVD)
, f
, f
, f
CPU
CPU
CPU
-V
Conditions
IT-(LVD)
-V
Conditions
-V
-V
, and T
, and T
, and T
Conditions
IT-(LVD)
IT-(AVD)
IT-(EVD)
A
A
A
.
.
.
2)
2)
2)
2)
3.55
2.95
3.35
6µs/V
4.0
2.8
Min
3.8
1.15
Min
1)
1)
1.1
3.95
3.75
1)
1)
1)
3.4
4.4
4.2
3.2
Min
1)
1)
1)
1)
1)
1)
Typ
3.75
3.15
3.55
200
4.2
4.0
3.0
Typ
1.26
200
1.2
Typ
4.15
200
450
4.6
3.6
4.4
4.0
3.4
100ms/V
3.75
3.15
3.35
4.25
Max
4.0
4.5
Max
40
1.35
4.65
1.3
DD
4.2
Max
4.9
4.4
3.8
3.6
1)
1))
1)
1)
1)
crosses the
1)
1)
1)
1)
1)
1)
141/187
Unit
Unit
mV
mV
Unit
ns
mV
mV
V
V
V
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