cxp81952 Sony Electronics, cxp81952 Datasheet - Page 18
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cxp81952
Manufacturer Part Number
cxp81952
Description
Cmos 8-bit Single Chip Microcomputer
Manufacturer
Sony Electronics
Datasheet
1.CXP81952.pdf
(27 pages)
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(2) Serial transfer (CH0)
Note 1)
Note 2) CS, SCK, SI and SO means each pin of CS
Note 3) The load of SCK output mode and SO output delay time is 50pF + 1TTL.
CS
delay time
CS
floating delay time
CS
delay time
CS
floating delay time
CS
high level width
SCK
cycle time
SCK
high and low level widths
SI input setup time
(against SCK )
SI input hold time
(against SCK )
SCK
upper 2 bits (CPU clock selection).
t
t
sys [ns] = 2000/fc (Upper 2 bits = "00"), 4000/fc (Upper 2 bits = "01"), 16000/fc (Upper 2 bits = "11")
sys indicates three values according to the contents of the clock control register (address; 00FE
SCK
SCK
SO
SO
SO delay time
Item
Symbol
t
t
t
t
t
t
t
t
t
t
t
DCSK
DCSKF
DCSO
DCSOF
WHCS
KCY
KH
KL
SIK
KSI
KSO
SCK0
SCK0
SO0
SO0
CS0
SCK0
SCK0
SI0
SI0
SO0
Pin
Chip select transfer mode
(SCK = output mode)
Chip select transfer mode
(SCK = output mode)
Chip select transfer mode
Chip select transfer mode
Chip select transfer mode
Input mode
Output mode
Input mode
Output mode
SCK input mode
SCK output mode
SCK input mode
SCK output mode
SCK input mode
SCK output mode
– 18 –
CS0, SCK
Condition
(Ta = –20 to +75°C, V
SCK0, SI
8000/fc – 100
SI0, and SO
2
–
2
t
t
sys + 200
t
t
t
sys + 100
sys + 200
sys + 100
sys + 100
8000/fc
Min.
200
100
DD
= 4.5 to 5.5V, Vss = 0V)
2
t
t
t
t
t
sys + 200
sys + 200
sys + 200
sys + 200
sys + 200
SO0 respectively.
Max.
100
CXP81952/81960
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
H
)