MC14584BCPG ON Semiconductor, MC14584BCPG Datasheet - Page 4

IC SCHMITT TRIGGER HEX 14DIP

MC14584BCPG

Manufacturer Part Number
MC14584BCPG
Description
IC SCHMITT TRIGGER HEX 14DIP
Manufacturer
ON Semiconductor
Series
4000Br
Datasheets

Specifications of MC14584BCPG

Logic Type
Inverter with Schmitt Trigger
Number Of Inputs
1
Number Of Circuits
6
Current - Output High, Low
3.4mA, 3.4mA
Voltage - Supply
3 V ~ 18 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Logical Function
Inverter Schmit Trig
Logic Family
4000
Number Of Elements
6
Input Type
Schmitt Trigger
High Level Output Current
-4.2mA
Low Level Output Current
4.2mA
Propagation Delay Time
250ns
Operating Supply Voltage (typ)
3.3/5/9/12/15V
Package Type
PDIP
Operating Temp Range
-55C to 125C
Pin Count
14
Quiescent Current
1uA
Output Type
Schmitt Trigger
Technology
CMOS
Mounting
Through Hole
Operating Temperature Classification
Military
Operating Supply Voltage (max)
18V
Operating Supply Voltage (min)
3V
Supply Voltage (max)
18 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Operating Supply Voltage
3 V to 18 V
Circuit Type
Low-Power Schottky
Current, Supply
30 μA
Function Type
6-Channels
Logic Function
Inverter
Special Features
Schmitt-Trigger
Temperature, Operating, Range
-55 to +125 °C
Voltage, Supply
3 to 18 VDC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC14584BCPGOS

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC14584BCPG
Manufacturer:
ON/安森美
Quantity:
20 000
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Part Number:
MC14584BCPG
Quantity:
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(a) Schmitt Triggers will square up inputs with slow
V
GENERATOR
V
out
in
PULSE
V
H
rise and fall times.
INPUT
7
V
Figure 1. Switching Time Test Circuit and Waveforms
DD
0
V
14
V
DD
SS
0
Figure 2. Typical Schmitt Trigger Applications
OUTPUT
Figure 3. Typical Transfer Characteristics
V
V
V
V
V
V
DD
T+
T−
SS
DD
SS
C
L
V
V
http://onsemi.com
in
in
, INPUT VOLTAGE (Vdc)
V
T−
V
H
4
V
T+
(b) A Schmitt trigger offers maximum noise immunity
V
V
out
in
V
out
V
H
OUTPUT
INPUT
20 ns
t
PHL
in gate applications.
V
DD
90%
50%
10%
t
f
90%
50%
10%
t
r
20 ns
t
PLH
V
V
V
V
DD
SS
OH
OL
V
V
V
V
V
V
DD
T+
T−
SS
DD
SS

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