74F533DCQB NSC [National Semiconductor], 74F533DCQB Datasheet

no-image

74F533DCQB

Manufacturer Part Number
74F533DCQB
Description
Octal Transparent Latch with TRI-STATE Outputs
Manufacturer
NSC [National Semiconductor]
Datasheet
C 1995 National Semiconductor Corporation
54F 74F533
Octal Transparent Latch with TRI-STATE Outputs
General Description
The ’F533 consists of eight latches with TRI-STATE outputs
for bus organized system applications The flip-flops appear
transparent to the data when Latch Enable (LE) is HIGH
When LE is LOW the data that meets the setup times is
latched Data appears on the bus when the Output Enable
(OE) is LOW When OE is HIGH the bus output is in the high
impedance state The ’F533 is the same as the ’F373 ex-
cept that the outputs are inverted
Logic Symbols
TRI-STATE is a registered trademark of National Semiconductor Corporation
Note 1 Devices also available in 13 reel Use suffix
Note 2 Military grade device with environmental and burn-in processing Use suffix
74F533PC
74F533SC (Note 1)
74F533SJ (Note 1)
Commercial
IEEE IEC
54F533DM (Note 2)
54F533FM (Note 2)
54F533LM (Note 2)
TL F 9548–4
TL F 9548–1
TL F 9548
Military
e
SCX and SJX
for DIP SOIC and Flatpak
Package
N20A
J20A
M20B
M20D
W20A
E20A
Number
Pin Assignment
Features
Y
Y
Y
Y
Connection Diagrams
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Eight latches in a single package
TRI-STATE outputs for bus interfacing
Inverted version of the ’F373
Guaranteed 4000V minimum ESD protection
e
TL F 9548 – 2
DMQB FMQB and LMQB
Package Description
Pin Assignment
for LCC
RRD-B30M75 Printed in U S A
TL F 9548 – 3
May 1995

Related parts for 74F533DCQB

74F533DCQB Summary of contents

Page 1

Octal Transparent Latch with TRI-STATE Outputs General Description The ’F533 consists of eight latches with TRI-STATE outputs for bus organized system applications The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH When LE is ...

Page 2

Unit Loading Fan Out Pin Names Description D –D Data Inputs Latch Enable Input (Active HIGH) OE Output Enable Input (Active LOW) O –O Complementary TRI-STATE Outputs 0 7 Function Table Inputs Output ...

Page 3

Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b Ambient Temperature under Bias b Junction Temperature under Bias b Plastic b V Pin Potential ...

Page 4

AC Electrical Characteristics Symbol Parameter Min t Propagation Delay 4 0 PLH PHL Propagation Delay 5 0 PLH PHL n t Output Enable Time 2 ...

Page 5

Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) 20-Lead Ceramic Dual-In-Line Package (D) NS Package Number E20A NS Package Number J20A 5 ...

Page 6

Physical Dimensions inches (millimeters) (Continued) 20-Lead (0 300 Wide) Molded Small Outline Package JEDEC (S) 20-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M20B NS Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) (Continued) 20-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N20A 7 ...

Page 8

Physical Dimensions inches (millimeters) (Continued) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 ...

Related keywords