MC74HC03ANG ON Semiconductor, MC74HC03ANG Datasheet

IC GATE NAND QUAD 2INPUT 14DIP

MC74HC03ANG

Manufacturer Part Number
MC74HC03ANG
Description
IC GATE NAND QUAD 2INPUT 14DIP
Manufacturer
ON Semiconductor
Series
74HCr
Datasheets

Specifications of MC74HC03ANG

Logic Type
NAND Gate with Open Drain
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Logic Family
HC
Logical Function
NAND
Number Of Elements
4
Low Level Output Current
5.2mA
Propagation Delay Time
180ns
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Temp Range
-55C to 125C
Package Type
PDIP
Number Of Outputs
1
Output Type
Open Drain
Technology
CMOS
Mounting
Through Hole
Pin Count
14
Operating Temperature Classification
Military
Quiescent Current
1uA
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Output Current
5.2mA
No. Of Inputs
2
Supply Voltage Range
2V To 6V
Logic Case Style
DIP
No. Of Pins
14
Operating Temperature Range
-55°C To +125°C
Filter Terminals
DIP
Rohs Compliant
Yes
Family Type
HC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74HC03ANGOS
MC74HC03A
Quad 2−Input NAND Gate
with Open−Drain Outputs
High−Performance Silicon−Gate CMOS
inputs are compatible with Standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
MOS N−Channel transistor. This NAND gate can, therefore, with a
suitable pullup resistor, be used in wired−AND applications. Having
the output characteristic curves given in this data sheet, this device can
be used as an LED driver or in any other application that only requires
a sinking current.
Features
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 10
The MC74HC03A is identical in pinout to the LS03. The device
The HC03A NAND gate has, as its outputs, a high−performance
Resistor
Output Drive Capability: 10 LSTTL Loads With Suitable Pullup
Outputs Directly Interface to CMOS, NMOS and TTL
High Noise Immunity Characteristic of CMOS Devices
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1mA
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 28 FETs or 7 Equivalent Gates
Pb−Free Packages are Available
A
B
PIN 14 = V
PIN 7 = GND
* Denotes open−drain outputs
1,4,9,12
2,5,10,13
Pinout: 14−Lead Packages (Top View)
V
14
A1
CC
1
CC
B4
13
B1
2
LOGIC DIAGRAM
A4
12
Y1
3
Y4
A2
11
4
PROTECTION
OUTPUT
DIODE
B3
B2
10
5
A3
Y2
9
6
V
CC
GND
Y3
3,6,8,11
8
7
Y*
1
14
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
14
14
1
(Note: Microdot may be in either location)
1
Z = High Impedance
1
ORDERING INFORMATION
A
WL or L = Wafer Lot
YY or Y
WW or W = Work Week
G or G
A
H
H
L
L
http://onsemi.com
FUNCTION TABLE
Inputs
CASE 948G
CASE 751A
TSSOP−14
DT SUFFIX
CASE 646
N SUFFIX
D SUFFIX
SOIC−14
PDIP−14
= Assembly Location
= Year
= Pb−Free Package
B
H
H
L
L
Publication Order Number:
14
1
14
1
Output
14
1
MC74HC03AN
DIAGRAMS
AWLYYWWG
MARKING
MC74HC03A/D
Y
Z
Z
Z
L
AWLYWW
HC03AG
ALYWG
HC
03
G

Related parts for MC74HC03ANG

MC74HC03ANG Summary of contents

Page 1

MC74HC03A Quad 2−Input NAND Gate with Open−Drain Outputs High−Performance Silicon−Gate CMOS The MC74HC03A is identical in pinout to the LS03. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC03A ...

Page 2

... Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol Parameter Î ...

Page 3

... ORDERING INFORMATION Device MC74HC03AN MC74HC03ANG MC74HC03AD MC74HC03ADG MC74HC03ADR2 MC74HC03ADR2G MC74HC03ADTR2 MC74HC03ADTR2G MC74HC03AFEL MC74HC03AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Package PDIP−14 PDIP− ...

Page 4

... Maximum Input Leakage Current in I Maximum Quiescent Supply CC Current (per Package) I Maximum Three−State Leakage OZ Current NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). AC CHARACTERISTICS (C = 50pF, Input t L Symbol t , Maximum Propagation Delay, Input Output Y PLZ ...

Page 5

INPUT A 50% 10 PZL PLZ 90% OUTPUT Y 50% 10% t THL Figure 1. Switching Waveforms *The expected minimum curves are not guarantees, but are design ...

Page 6

−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

Page 7

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 8

... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

Related keywords