em78p809n ELAN Microelectronics Corp, em78p809n Datasheet - Page 25

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em78p809n

Manufacturer Part Number
em78p809n
Description
8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
Bit 0 ( WBE ) : Write buffer empty flag. Read only.
SPID7
SPIS
Bit 7
Bit 7
Bit 7
SPIC2 − SPI Control Register 2 (Address : 06h )
SPID (SPI Data Buffer ( Address: 07h )
PHC1 − Pull High Control Register 1 ( Address: 0Ah )
Bit 7 ~ Bit 0 ( SPID7 ~ SPID0 ) : SPI data buffer.
Bit 7 ( SPIS ) : SPI start shift, set the bit to “1” and shift register starts to shift. It is
Bit 2 ~ Bit 1 ( SPIM1 ~ SPIM0) : SPI Transfer Mode Select
Bit 0 ( RBF ) : Set to 1 by Buffer Full Detector, and cleared to 0 automatically when
Bit 5 ~ 4 ( /PHE81 ~ /PHE80 ) : bits 1, 0 of Port 8 Pull high enable bit
-
TC2CK1
buffer.
WBE = “0” : Write buffer empty
WBE = “1” : Not empty, set to “1” automatically when writing data to the data
0
0
1
1
SPIS = “0” : Shift finish
SPIS = “1” : Shift starts
SPID6
Bit 6
Bit 6
Bit 6
/PHE8x = “0” : Enable P8x pull high
/PHE8x = “1” : Disable P8x pull high
0
-
reading data from the SPID register. RBF bit will be cleared by
hardware when enabling SPI. And RBF bit is read-only. Therefore,
reading the SPRL register is necessary to avoid data collision to
occur (DCOL).
cleared by hardware when shifting is finished. In transferring the
next data, it must be set to “1” again.
/PHE81
SPID5
Bit 5
Bit 5
Bit 5
0
TC2CK0
0
1
0
1
/PHE80
SPID4
Bit 4
Bit 4
Bit 4
0
/PHE63
SPID3
Bit 3
Bit 3
Bit 3
0
8-bit Transmit/Receive mode
8-bit Transmit mode
8-bit Receive mode
/PHE62
SPIM1
SPID2
Bit 2
Bit 2
Bit 2
Transfer Mode
Reserved
8-Bit Microcontroller
/PHE61
SPIM0
SPID1
Bit 1
Bit 1
Bit 1
EM78P809N
/PHE60
SPID0
Bit 0
Bit 0
Bit 0
RBF
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