em78p5842 ELAN Microelectronics Corp, em78p5842 Datasheet - Page 27

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em78p5842

Manufacturer Part Number
em78p5842
Description
8-bit Micro-controller
Manufacturer
ELAN Microelectronics Corp
Datasheet
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* This specification is subject to change without notice.
VII.5 RESET
VII.6 Wake-up
VII.7 Interrupt
The RESET can be caused by
(1) Power on reset
(2) WDT timeout. (if enabled and in GREEN or NORMAL mode)
(3) /RESET pin pull low (At P71S = 1).
Once the RESET occurs, the following functions are performed.
x The oscillator is running, or will be started.
x The Program Counter (R2) is set to all "0".
x When power on, the upper 3 bits of R3 and the upper 2 bits of R4 are cleared.
x The Watchdog timer and prescaler counter are cleared.
x The Watchdog timer is disabled.
The controller provided sleep mode for power saving :
Wake-up from SLEEP mode
All these cases will reset controller , and run the program at address zero. The status just like the power on reset.
Be sure to enable circuit at case (1) or (2).
RF is the interrupt status register which records the interrupt request in flag bit. IOCF is the interrupt mask
register. Global interrupt is enabled by ENI instruction and is disabled by DISI instruction. When one of the
interrupts (when enabled) generated, will cause the next instruction to be fetched from address 008H. Once in the
interrupt service routine, the source of the interrupt can be determined by polling the flag bits in the RF register.
The interrupt flag bit must be cleared in software before leaving the interrupt service routine and enabling
interrupts to avoid recursive interrupts.
SLEEP mode, RA(7) = 0 + "SLEP" instruction
(1) WDT time out
(2) External interrupt
(3) /RESET pull low
The controller will turn off all the CPU and crystal. Other circuit with power control like key tone control or
PLL control (which has enable register), user has to turn it off by software.
25
EM785840/5841/5842
8-bit Micro-controller
2004/11/10 V1.2

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