x24012 Intersil Corporation, x24012 Datasheet
x24012
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x24012 Summary of contents
Page 1
... Xicor E PROMs are designed and tested for applica- tions requiring extended endurance. Inherent data re- tention is greater than 100 years. The X24012 is avail- able in eight pin DIP and SOIC packages. START CYCLE CONTROL LOGIC XDEC ...
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... PIN CONFIGURATION PIN NAMES Symbol A –A 0 SDA SCL DIP/SOIC X24012 SCL SDA Description Address Inputs 2 Serial Data Serial Clock No Connect Ground +5V 3847 FHD F02 3847 PGM T01 ...
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... The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers and provide the clock for both transmit and receive operations. There- fore, the X24012 will be considered a slave in all applications. Figure 1. Data Validity SCL SDA Figure 2 ...
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... All communications must be terminated by a stop condi- tion, which is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used by the X24012 to place the device into the standby power mode after a read sequence. A stop condition can only be issued after the transmitting device has released the bus ...
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... A A and A 1 outputs an acknowledge on the SDA line. Depending on the state of the R/W bit, the X24012 will execute a read or write operation. WRITE OPERATIONS Byte Write For a write operation, the X24012 requires a second address field. This address field is the word address, ...
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... This involves issuing the start condition followed by the slave address for a write operation. If the X24012 is still busy with the write operation no ACK will be returned. If the X24012 has completed the write operation an ACK will be returned and the master can then proceed with the next read or write operation (See Flow 1) ...
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... R/W bit set to one. This will be followed by an acknowledge from the X24012 and then by the eight bit word. The read operation is terminated by the master; by not responding with an acknowledge and by issuing a stop condition. ...
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... At the end of the address space (address 127), the counter “rolls over” to address 0 and the X24012 continues to output data for each acknowledge received. Refer to Figure 9 for the address, acknowl- edge and data transfer sequence. ...
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... Exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. Max. Supply Voltage 70 C X24012 +85 C X24012-3 +125 C X24012-2.7 3847 PGM T02 Limits Min. Max. Units ...
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... X24012 A.C. CONDITIONS OF TEST Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels A.C. CHARACTERISTICS LIMITS (Over recommended operating conditions unless otherwise specified) Read & Write Cycle Limits Symbol f SCL Clock Frequency SCL T Noise Suppression Time Constant at SCL, SDA Inputs ...
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... Write Cycle Time WR The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, the X24012 Write Cycle Timing SCL SDA 8th BIT WORD n Notes: (5) Typical values are for and nominal supply voltage (5V) ...
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... X24012 NOTES 12 ...
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... X24012 PACKAGING INFORMATION 8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P 0.430 (10.92) 0.360 (9.14) 0.092 (2.34) DIA. NOM. PIN 1 INDEX PIN 1 0.300 (7.62) REF. HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL SEATING PLANE 0.150 (3.81) 0.125 (3.18) 0.110 (2.79) 0.090 (2.29) 0.325 (8.25) 0.015 (0.38) 0.300 (7.62) MAX. TYP. 0.010 (0.25) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 8-LEAD PLASTIC SMALL OUTLINE GULL WING 0 ...
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... Temperature Range Blank = Commercial = + Industrial = – + Military = – +125 C Package P = 8-Lead Plastic DIP S = 8-Lead SOIC X24012 X Blank = 8-Lead SOIC P = 8-Lead Plastic DIP S = 8-Lead SOIC X Blank = 4.5V to 5.5V + 4.5V to 5.5V, – + 3.0V to 5.5V + 3.0V to 5.5V, – ...