cxd1196ar Sony Electronics, cxd1196ar Datasheet - Page 15

• Manufacturer Part Number: cxd1196ar
• Description: Cd-rom Decoder
• Manufacturer: Sony Electronics

1.4 DAC interface
1.5 Miscellaneous
1.6 Test pins
(8) DRQ (DATA REQUEST : Output)
(9) XDAC (DATA ACKNOWLEDGE : Input)
(1) BCKO (BIT CLOCK OUTPUT : Output)
(2) WCKO (WORD CLOCK OUTPUT : Output)
(3) LRCO (LR CLOCK OUTPUT : Output)
(4) DATO (DATA OUTPUT : Output)
(1) MUTE (MUTE : Output)
(2) XRST (RESET : Input)
(3) XTL1 (X’TAI1 : Input)
(4) XTL2 (X’TAI2 : Output)
(5) CLK (CLOCK : Output)
These pins are normally kept in the opened state.
(1) TD0-7 (Input/Output) : Data bus for IC test. Pulled up by a typical 25 k resistor.
(2) TDIO (Input) : Input pin for IC test. Pulled up by a typical 50 k resistor.
(3) TA0-3 (Input) : Input pins for IC test. Pulled up by a typical 50 k resistor.
DMA data request signal (positive logic output)
The acknowledge signal for DRQ (negative logic input). In the IC, it is pulled up by a typical 50 k
resistor.
Bit clock output signal to DA converter
Word clock output signal to DA converter
LR clock output signal to DA converter
Data output signal to DA converter
Fig. 1.1 shows a timing chart for interface with the DA converter.
Output H when DA data is muted
Chip reset signal (negative logic input)
Connect a 16.9344 MHz crystal oscillator unit between XTL1 and XTL2. (The value of the capacitor
depends on the crystal oscillator unit.) Or input 16.9344 MHz clock to the XTL1 pin. For ADPCM or
CD-DA playback, the clocks of the DSP for CD and this IC must be synchronized.
Output 8.4672 clock.
When this clock is not be used, the output of the CLK pin may be fixed at ‘L’.
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CXD1196AR