ht48c50-1 Holtek Semiconductor Inc., ht48c50-1 Datasheet - Page 17
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ht48c50-1
Manufacturer Part Number
ht48c50-1
Description
Ht48r50a-1/ht48c50-1 -- I/o Type 8-bit Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
1.HT48C50-1.pdf
(41 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ht48c50-1-DBPF
Manufacturer:
HOLTEK
Quantity:
500
The I/O functions of PB0/PB1 are shown below.
Note:
The PG0 is pin-shared with INT.
In case of Internal RC+I/O system oscillator, the PG1
and PG2 are pin-shared with OSC1 and OSC2 pins.
Once the Internal RC+I/O mode is selected, the PG1
and PG2 can be used as general purpose I/O lines. Oth-
erwise, the pull-high resistors and I/O functions of PG1
and PG2 will be disabled.
It is recommended that unused or not bonded out I/O
lines should be set as output pins by software instruction
to avoid consuming power under input floating state.
Low Voltage Reset - LVR
The microcontroller provides low voltage reset circuit in
order to monitor the supply voltage of the device. If the
supply voltage of the device is within the range
0.9V~V
will automatically reset the device internally.
Note:
Rev. 2.00
PB0 I/O
PB1 I/O
PB0 Mode
PB1 Mode
PB0 Data
PB1 Data
PB0 Pad Status
PB1 Pad Status
LVR
*1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024
*2: Since low voltage has to be maintained its original state for longer than 1ms, therefore a 1ms delay
I input, O output, D, D
B buzzer option, BZ or BZ, x don't care
C CMOS output
, such as when changing a battery, the LVR
system clock pulses before starting the normal operation.
enters the reset mode.
x
x
x
x
I
I
I
I
O
C
D
D
x
x
I
I
0
, D
1
data,
O
C
D
D
x
x
I
I
Low Voltage Reset
O
B
x
0
x
0
I
I
17
The LVR includes the following specifications:
The relationship between V
Note:
O
B
B
x
1
x
I
I
The low voltage (0.9V~V
nal state for longer than 1ms. If the low voltage state
does not exceed 1ms, the LVR will ignore it and will
not perform a reset function.
The LVR uses an OR function with the external RES
signal to perform a chip reset.
V
tion at 4MHz system clock.
D
D
D
D
OPR
O
O
C
C
0
1
0
1
is the voltage range for proper chip opera-
HT48R50A-1/HT48C50-1
O
O
B
C
D
D
0
0
LVR
DD
O
O
) has to remain in its origi-
B
C
D
B
D
1
and V
LVR
O
O
is shown below.
B
B
0
x
0
0
March 8, 2006
O
O
B
B
B
B
1
x