SST89E554 SST [Silicon Storage Technology, Inc], SST89E554 Datasheet - Page 43

• Manufacturer Part Number: SST89E554
• Description: FlashFlex51 MCU
• Manufacturer: SST [Silicon Storage Technology, Inc]

FlashFlex51 MCU
SST89E564 / SST89V564 / SST89E554 / SST89V554
Preliminary Specifications
9.0 RESET
A system reset initializes the MCU and begins program
execution at program memory location 0000H. The reset
input for the device is the RST pin. In order to reset the
device, a logic level high must be applied to the RST pin for
at least two machine cycles (24 clocks), after the oscillator
becomes stable. ALE, PSEN# are weakly pulled high dur-
ing reset. During reset, ALE and PSEN# output a high level
in order to perform a proper reset. This level must not be
affected by external element. A system reset will not affect
the 1 KByte of on-chip RAM while the device is running,
however, the contents of the on-chip RAM during power up
are indeterminate. Following reset, all Special Function
Registers (SFR) return to their reset values outlined in
Tables 3-5 to 3-9.
9.1 Power-On Reset
At initial power up, the port pins will be in a random state
until the oscillator has started and the internal reset algo-
rithm has weakly pulled all pins high. Powering up the
device without a valid reset could cause the MCU to
start executing instructions from an indeterminate
location. Such undefined states may inadvertently cor-
rupt the code in the flash.
When power is applied to the device, the RST pin must be
held high long enough for the oscillator to start up (usually
several milliseconds for a low frequency crystal), in addition
to two machine cycles for a valid Power-On Reset. An
example of a method to extend the RST signal is to imple-
ment a RC circuit by connecting the RST pin to V
through a 10 µF capacitor and to V
resistor as shown in Figure 9-1. Note that if an RC circuit is
being used, provisions should be made to ensure the V
rise time does not exceed 1 millisecond and the oscillator
start-up time does not exceed 10 milliseconds.
For a low frequency oscillator with slow start-up time the
reset signal must be extended in order to account for the
slow start-up time. This method maintains the necessary
relationship between V
at an indeterminate location, which may cause corruption
in the code of the flash. For more information on system
level design techniques, please review Design Consider-
ations for the SST FlashFlex51 Family Microcontroller
Application Note.
©2001 Silicon Storage Technology, Inc.
DD
and RST to avoid programming
SS
through an 8.2K
DD
DD
43
9.2 Software Reset
The software reset is executed by changing SFCF[1]
(SWR) from “0” to “1”. A software reset will reset the pro-
gram counter to address 0000H. All SFR registers will be
set to their reset values, except SFCF[1] (SWR), WDTC[2]
(WDTS), and RAM data will not be altered.
9.3 Brown-out Detection Reset
The device includes a Brown-out detection circuit to protect
the system from severe V
voltage parameters, please refer to Tables 10-3 and 10-4.
Brown-out interrupt can be enabled by setting the EBO bit
in IEA register (address E8H, bit 3). If EBO bit is set and a
Brown-out condition occurs, a Brown-out interrupt will be
generated to execute the program at location 004BH. It is
required that the EBO bit be cleared by software after the
Brown-out interrupt is serviced. Clearing EBO bit when the
Brown-out condition is active will properly reset the device.
If Brown-out interrupt is not enabled, a Brown-out condition
will reset the program to resume execution at location 0000H.
9.4 Interrupt Priority and Polling
Sequence
The device supports eight interrupt sources under a four
level priority scheme. Table 9-1 summarizes the polling
sequence of the supported interrupts. Note that the SPI
serial interface and the UART share the same interrupt
vector.
V DD
FIGURE
10µF
8.2K
9-1: P
+
-
OWER
C 1
C 2
DD
-
ON
fluctuations. For Brown-out
R
XTAL2
RST
XTAL1
ESET
SST89E5x4/V5x4
S71181-03-000 9/01
C
IRCUIT
V DD
384 ILL F31.2
384