ISL3036E INTERSIL [Intersil Corporation], ISL3036E Datasheet
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ISL3036E
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ISL3036E Summary of contents
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... Protection on ALL Input, Output, and I/O Lines • 100Mbps Guaranteed Data Rate • Four (ISL3036) or Six (ISL3034, ISL3035) Bi-directional Channels • Auto-direction Sensing Eliminates Direction Control Logic Pins • Enable Input (ISL3034E, ISL3036E) for Logic Control of and V supply CC L Low Power SHDN Mode • ...
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... ISL3034EIRUZ-T (Notes 2, 3) ISL3035EIRTZ (Note 1) ISL3035EIRTZ-T (Notes 1, 3) ISL3035EIRUZ-T (Notes 2, 3) ISL3036EIRZ-T (Notes 1, 3) ISL3036EIRUZ-T (Notes 2, 3) NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020 ...
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... LD µTQFN) TOP VIEW I/ I/ I/ I/ I/ NOTES For normal operation, V For normal operation, V ISL3034E and ISL3036E only . CC . ISL3035E only ISL3035E only ISL3035E only > > FN6492.0 March 31, 2009 ...
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... V > 0.7V; ISL3035E Only > 0.7V ISL3035E Only ISL3034E and ISL3036E Only V rising falling GND; ISL3034E and ISL3036E Only V > 0.7V); ISL3035E Only I/OV = GND I/OV = GND L CC θ (°C/ unless otherwise noted. Typical values are at ...
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... I/OV , CLK_V Fall Time FVCC I/OV , CLK_RET Rise Time t L RVL 5 ISL3034E, ISL3035E, ISL3036E = +1.35V to +3.2V +1.8V and T = +25°C. (Note 6). (Continued TEST CONDITIONS IEC61000-4-2 Air-Gap Discharge IEC61000-4-2 Contact Discharge Human Body Model HBM, per JEDEC Machine Model, per JEDEC (Note 7) ...
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... I/OV L Test Circuits and Waveforms I/OV L 150Ω SIGNAL GENERATOR FIGURE 1A. TEST CIRCUIT FIGURE 1. I/ ISL3034E, ISL3035E, ISL3036E = +1.35V to +3.2V +1.8V and T = +25°C. (Note 6). (Continued TEST CONDITIONS R = 150Ω 15pF, S I/OVL C = 15pF CLK_RET R = 150Ω, C ...
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... SIGNAL EN GENERATOR I/OV L I/OV CC GND SW1 PARAMETER SW1 t GND ENL t V ENH L FIGURE 4A. TEST CIRCUIT 7 ISL3034E, ISL3035E, ISL3036E (Continued) I/OV L I/OV I/ OUTPUT PROPAGATION DELAY AND TRANSITION TIMES (PUSH - PULL) 1MΩ I/OV GND SW2 SW2 V CC I/OV GND FIGURE 3. I/OV OUTPUT ENABLE TIMES CC 1MΩ ...
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... I/OV pin) or down I/OV pin), and then drives the shifted level on the other CC side. The ISL3035E enables whenever V while the ISL3034E and ISL3036E enable AND V > 200mV Upon detecting a transition on either I/O pin, that channel’s accelerator circuitry actively drives the opposite side’s (output) pin to GND or the output’ ...
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... I/O and output pins, considerably reduces current consumption, and enables any pull-up resistors on a port’s I/O pins (see Table 1). The ISL3034E and ISL3036E enter the SHDN mode when the EN input switches low, or automatically when the V below the V voltage ...
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... IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (typically I/OV pins in memory card CC applications) but the ISL3034E, ISL3035E, and ISL3036E feature IEC61000 ESD protection on all logic and I/O pins (both I/OV and I/ well as CLK pins). Unlike HBM ...
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... SWITCHING 6 I/ SWITCHING 4 I/ SWITCHING 1 I/OV INPUT CAPACITIVE LOAD (pF) FIGURE 13. V SUPPLY CURRENT vs I/OV L LOAD 11 ISL3034E, ISL3035E, ISL3036E V = 3.3V 1.8V 15pF +25°C; Unless Otherwise Specified. (Continued) A INPUTS L 3.2 3.4 3.6 SUPPLY FIGURE 10 INPUTS CC INPUTS ...
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... CAPACITIVE LOAD (pF) FIGURE 17. PROPAGATION DELAY vs I/OV LOAD 2.0 1.5 1.0 0.5 0 3.0 2.5 2.0 1.5 1.0 0 35pF L 0 TIME (4ns/DIV) FIGURE 19. I/OV OUTPUT WAVEFORMS (100Mbps ISL3034E, ISL3035E, ISL3036E V = 3.3V 1.8V 15pF +25°C; Unless Otherwise Specified. (Continued RVCC CAPACITIVE LOAD FIGURE 16. RISE/FALL TIME vs I/OV 3.4 3.2 3.0 2.8 2.6 2 CAPACITIVE FIGURE 18 ...
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... C = 15pF SOURCE T = +25°C; Unless Otherwise Specified. (Continued) A Die Characteristics SUBSTRATE AND TQFN/QFN THERMAL PAD POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL3034E, ISL3035E - 2600 ISL3036E - 2000 PROCESS: Si Gate BiCMOS = 150Ω, Data Rate = 100Mbps, push-pull driver, FN6492.0 March 31, 2009 ...
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... PIN # (DATUM B) (DATUM A) BOTTOM VIEW C L (A1 SECTION "C-C" 3.00 1.80 1.40 2.20 0.90 0.20 0.50 0.40 10 LAND PATTERN 14 ISL3034E, ISL3035E, ISL3036E L16.2.6x1. LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE SYMBOL θ 5 ...
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... Package Outline Drawing L14.3.5x3.5 14 LEAD QUAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (QFN) Rev 0, 2/08 3.50 (4X) 0.15 TOP VIEW ( 2. 3.30 TYP ) ( 2.05) TYPICAL RECOMMENDED LAND PATTERN 15 ISL3034E, ISL3035E, ISL3036E A 6 PIN 1 INDEX AREA B 3.50 VIEW “A-A” (8x 0.50 1 14x 0. 0.60) NOTES 2.0 8x 0.50 6 PIN #1 INDEX AREA ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 ISL3034E, ISL3035E, ISL3036E L16.3x3A C A ...