AD671KD-500 AD [Analog Devices], AD671KD-500 Datasheet - Page 9

• Manufacturer Part Number: AD671KD-500
• Description: Monolithic 12-Bit 2 MHz A/D Converter
• Manufacturer: AD [Analog Devices]

REV. B
GROUNDING AND DECOUPLING RULES
Proper grounding and decoupling should be a primary design
objective in any high speed, high resolution system. The AD671
separates analog and digital grounds to optimize the manage-
ment of analog and digital ground currents in a system. The
AD671 is designed to minimize the current flowing from
ACOM (Pin 22) by directing the majority of the current from
V
ground currents hence reduces the potential for large ground
voltage drops. This can be especially true in systems that do not
utilize ground planes or wide ground runs. ACOM is also con-
figured to be code independent, therefore reducing input depen-
dent analog ground voltage drops and errors. The input current
supplied by the external reference (REFIN–Pin 19) and the ma-
jority of the full-scale input signal (AIN–Pin 20) are also di-
rected to V
the use of proper digital grounding techniques to avoid potential
CMOS “ground bounce.” Figure 6 is provided to assist in the
proper layout, grounding and decoupling techniques.
Table I is a list of grounding and decoupling guidelines that
should be reviewed before laying out a printed circuit board.
CC
(+5 V–Pin 23) to V
C14
1 F
Figure 5. AD586 as Reference Input for AD671
Figure 6. AD671 Grounding and Decoupling
ÉE
AGP*
8
. Also critical in any high speed digital design are
+ 5V REF
V
NOISE
REDUCTION
AD586
IN
U4
GND
+
–
DGP*
5V
*GROUND PLANE RECOMMENDED
4
+
+V
V
15V
OUT
2
IN
EE
0.1 F
6
6.8 F
(–5 V–Pin 24). Minimizing analog
C15
10 F
5V
18
19
20
22
21
+ 5V
23
V
AIN
ACOM
DCOM
REF IN
BPO/UPO
CC
0.1 F
10 F
AD671
V
18
19
22
20
21
– 5V
EE
24
AIN
V
ACOM
DCOM
REF IN
BPO/UPO
0.1 F
ENCODE
23
CC
U3
10 F
BIT12
MSB
AD671
V
DAV
OTR
BIT1
V
24
LOGIC
+ 5V
EE
17
ENCODE
V
12
16
15
14
13
LOGIC
17
1
BIT12
MSB
DAV
BIT1
OTR
12
16
15
14
13
1
–9–
Power Supply
Decoupling
Capacitor Values
Capacitor Locations Directly at Positive and Negative
Grounding
Analog Ground
Digital Ground
Analog and Digital
Ground
UNIPOLAR (0 V TO +10 V) CALIBRATION
The AD671 is factory trimmed to minimize offset, gain and lin-
earity errors. In some applications the offset and gain errors of
the AD671 need to be externally adjusted to zero. This is ac-
complished by trimming the voltage at BPO/UPO (Pin 21) and
REFIN (Pin 19). In those applications the AD588, a high preci-
sion pin programmable voltage reference, is an ideal choice. The
AD588 includes a reference cell and three additional amplifiers
which can be configured to provide offset and gain trims for the
AD671. The circuit in Figure 7 is recommended for calibrating
offset and gain errors of the AD671 when configured in the 0 V
to +10 V input range.
The AD671 is intended to have a nominal 1/2 LSB offset so
that the exact analog input for a given code will be in the middle
of that code (halfway between the transitions to the codes above
it and below it). Thus, the first transition ( from 0000 0000 0000
to 0000 0000 0001) will occur for an input level of +1/2 LSB
(1.22 mV for 10 V range). If the offset trim resistor R2 is used,
1 F
Table I. Grounding and Decoupling Guidelines
5
Figure 7. Unipolar (0 V to +10 V) Calibration
7
9
100k
10
AD588
6
8
+
15V
4
12
39k
R2
5k
11
Comment
0.1 F (Ceramic) and 10 F (Tantalum).
(Surface Mount Chip Capacitors Recom-
mended to Reduce Lead Inductance).
Supply Pins to Respective Ground Plane.
Ground Plane or Wide Ground Return
Connected to the Analog Power Supply.
Ground Plane or Wide Ground Return
Connected to the Digital Power Supply.
Connected Together Once at the AD671.
3
150pF
13
14
15
16
50
1
2
+ 15
100
–15
R1
1 F
150
50
10 F
10 F
10k
0 TO
0.1 F
0.1 F
+
0.1 F
10V
10 F
19
20
22
18
21
+ 5V
23
AIN
V
ACOM
DCOM
REF IN
BPO/UPO
CC
0.1 F
AD671
10 F
AD671
V
EE
– 5V
24
0.1 F
ENCODE
10 F
BIT12
V
MSB
DAV
OTR
BIT1
LOGIC
+ 5V
17
12
16
15
14
13
1