lxt9781 Intel Corporation, lxt9781 Datasheet - Page 16

• Manufacturer Part Number: lxt9781
• Description: Fast Ethernet 10/100 Multi-port Transceiver With Rmii
• Manufacturer: Intel Corporation

LXT9761/9781 — Fast Ethernet 10/100 Multi-Port Transceiver with RMII
16
1. Type Column Coding: I = Input, O = Output.
2. Ports 6 and 7 are available only on the LXT9781. These pins are not bonded out on the LXT9761.
1. Pin numbers apply to both the LXT9761 and the LXT9781.
2. Type Column Coding: I = Input, O = Output, IP = weak Internal Pull-up, ID = weak Internal pull-Down.
107, 108
121, 122
140, 139
150, 151
154, 153
104, 105
143, 142
146, 147
157, 156
111, 110
115, 114
118, 119
PQFP
PQFP
Pin#
9761
Pin#
– , –
– , –
– , –
– , –
Table 3.
Table 4.
163
164
165
166
167
1
9781 PBGA
107, 108
121, 122
125, 124
136, 137
140, 139
150, 151
154, 153
104, 105
129, 128
132, 133
143, 142
146, 147
157, 156
115, 114
118, 119
111, 110
LXT97x1 Network Interface Signal Descriptions
LXT97x1 JTAG Test Signal Descriptions
PQFP
Pin#
D14
C15
B16
D15
A16
9781
Pin#
W19, W20
M20, M19
TDI
TDO
TMS
TCK
TRST
N20, N19
H19, H20
G20, G19
C19, C20
U20, U19
R19, R20
D19, D20
V20, V19
P19, P20
B20, B19
Y19, Y20
A20, A19
F20, F19
J20, J19
PBGA
Symbol
TPFOP0, TPFON0
TPFOP1, TPFON1
TPFOP2, TPFON2
TPFOP3, TPFON3
TPFOP4, TPFON4
TPFOP5, TPFON5
TPFOP6, TPFON6
TPFOP7, TPFON7
TPFIP0, TPFIN0
TPFIP1, TPFIN1
TPFIP2, TPFIN2
TPFIP3, TPFIN3
TPFIP4, TPFIN4
TPFIP5, TPFIN5
TPFIP6, TPFIN6
TPFIP7, TPFIN7
Type
I, ID
I, IP
I, IP
I, IP
Symbol
O
2
Test Data Input. Test data sampled with respect to the rising edge
of TCK.
Test Data Output. Test data driven with respect to the falling edge
of TCK.
Test Mode Select.
Test Clock. Clock input for JTAG test (REFCLK).
Test Reset. Reset input for JTAG test.
Type
AO
AI
1
Twisted-Pair/Fiber Outputs,
Positive & Negative - Ports 0-7.
During 100BASE-TX or 10BASE-T operation,
TPFO pins drive 802.3 compliant pulses onto
the line.
During 100BASE-FX operation, TPFO pins
produce differential PECL outputs for fiber
transceivers.
Twisted-Pair/Fiber Inputs,
Positive & Negative - Ports 0-7.
During 100BASE-TX or 10BASE-T operation,
TPFI pins receive differential 100BASE-TX or
10BASE-T signals from the line.
During 100BASE-FX operation, TPFI pins
receive differential PECL inputs from fiber
transceivers.
Signal Description
Signal Description
2
Datasheet