icx434 Sony Electronics, icx434 Datasheet - Page 17

• Manufacturer Part Number: icx434
• Description: Timing Generator For Frame Readout Ccd Image Sensor
• Manufacturer: Sony Electronics

Control data: D32 FGOB [Wide OBCLP generation]
This controls wide OBCLP generation during the vertical OPB period. When this function is on, the D34 and
D35 PTOB setting is invalid for the output block. See the Timing Charts for the actual operation. The default is
"OFF".
Control data D34 and D35 PTOB [OBCLP waveform pattern]
This designates the OBCLP waveform pattern. The default is "Normal". See the Timing Charts for details of the
decoding values.
Control data: D36 and D37 LDAD [ADCLK logic phase]
This indicates the ADCLK logic phase adjustment data. The default is "90°" relative to MCKO.
Control data: D38 and D39 STB [Standby]
The operating mode is switched as follows. However, the standby bits are loaded to the CXD3615R and control
is applied immediately at the rising edge of SEN.
See the Pin Status Table for the pin status in each mode.
D32
D35
D37
D39
0
1
0
0
1
1
0
0
1
1
0
0
1
1
Wide OBCLP generation OFF
Wide OBCLP generation ON
D34
D36
D38
0
1
0
1
0
1
0
1
0
1
0
1
Description of operation
Symbol
Degree of adjustment (°)
CAM
SLP
SST
STB
Normal operating mode
Sleep mode
Siesta mode
Standby mode
180
270
Waveform pattern
90
0
Operating mode
(Normal)
(Shifted rearward)
(Shifted forward)
(Wide)
– 17 –
20 to 44
14 to 38
26 to 50
14 to 50
ICX432
19 to 45
13 to 39
25 to 51
13 to 51
ICX434
CXD3615R