DS3884AVF NSC [National Semiconductor], DS3884AVF Datasheet - Page 4

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DS3884AVF

Manufacturer Part Number
DS3884AVF
Description
BTL Handshake Transceiver
Manufacturer
NSC [National Semiconductor]
Datasheet

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DRIVER
t
t
t
t
t
t
SR
t
RECEIVER
t
t
t
FILTERED RECEIVER
t
t
t
FILTERED RECEIVER TIMING REQUIREMENTS
t
PARAMETERS NOT TESTED
Coutput
t
Symbol
PHL
PLH
PHL
PLH
r
f
skew
PHL
PLH
skew
PHL
PLH
GR
s
NR
AC Electrical Characteristics
T
Note 6: Input waveforms shall have a rise/fall time of 3 ns.
Note 7: t
Note 8: Filtered receiver t
Note 9: The parameter is tested using TDR techniques described in P1194.0 BTL Backplane Design Guide.
Note 10: This parameter is tested during device characterization. The measurements revealed that the part will reject 1 ns pulse width.
Note 11: Futurebus+ transceivers are required to limit bus signal rise and fall times to no faster than 0.5V/ns, measured between 1.3V and 1.8V (approximately 20%
to 80% of nominal voltage swing). The rise and fall times are measured with a transceiver loading equivalent to 12.5
A
= 0˚C to +70˚C, V
skew
Dn to Bn
DE
Transition Time — Rise/Fall
20% to 80%
Skew Rate is Calculated
from 1.3V to 1.8V
Skew between Drivers in
the Same Package
Bn to Rn
Skew between Receivers in
Same Package
Bn to FRn
Bn to FRn
Glitch Rejection
PSn to Bn
Capacitance at Bn
Noise Rejection
is an absolute value defined as differences seen in propagation delays between drivers in the same package with identical load conditions.
*
to Bn
PLH
CC
is independent of filter setting.
= 5V
Parameter
±
10%
Prop. Delay
Enable Time
Disable Time
Prop. Delay
Prop. Delay
Prop. Delay
Set-Up Time
(Note 6)
DE
( Figure 1 , Figure 2 )
Dn = 3V
( Figure 1 , Figure 3 )
( Figure 1 , Figure 2 )
(Note 11)
(Note 7)
DE
( Figure 4 , Figure 5 )
(Note 7)
PS1 = 0V PS2 = 0V DE
( Figure 4 , Figure 5 ), R
PS1 = 0V PS2 = 3V DE
( Figure 4 , Figure 5 ), R
PS1 = 3V PS2 = 0V DE
( Figure 4 , Figure 5 ), R
PS1 = 3V PS2 = 3V DE
( Figure 4 , Figure 5 ), R
DE
(Note 8)
R
PS1 = 0V PS2 = 0V DE
( Figure 4 , Figure 6 ), R
PS1 = 0V PS2 = 3V DE
( Figure 4 , Figure 6 ), R
PS1 = 3V PS2 = 0V DE
( Figure 4 , Figure 6 ), R
PS1 = 3V PS2 = 3V DE
( Figure 4 , Figure 6 ), R
( Figure 7 ), R
(Note 9)
(Note 10)
EXT
*
*
*
= 0V
= 3V
= 3V ( Figure 4 , Figure 5 )
= 13 k
4
Conditions
EXT
= 13 k
EXT
EXT
EXT
EXT
EXT
EXT
EXT
EXT
= 13 k
= 13 k
= 13 k
= 13 k
= 13 k
= 13 k
= 13 k
= 13 k
*
*
*
*
*
*
*
*
= 3V
= 3V
= 3V
= 3V
= 3V
= 3V
= 3V
= 3V
tied to +2.1V DC.
Min
250
11
15
25
10
14
24
1
1
2
2
1
1
2
2
6
2
5
Typ
12
16
21
33
13
18
31
3
3
4
4
2
2
1
4
4
1
5
9
5
1
Max
3.5
3.5
0.5
16
21
27
45
16
18
24
42
5
5
6
6
3
5
6
3
7
Units
V/ns
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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