DS3231S+ DALLAS [Dallas Semiconductor], DS3231S+ Datasheet - Page 11

• Manufacturer Part Number: DS3231S+
• Description: Extremely Accurate I2C-Integrated RTC/TXO/Crystal
• Manufacturer: DALLAS [Dallas Semiconductor]

DS3231 I
by toggling SCL until SDA is observed to be at a high
level. At that point the microcontroller should pull SDA
low while SCL is high, generating a START condition.
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates the
RTC registers. The time and calendar data are set or ini-
tialized by writing the appropriate register bytes. The con-
tents of the time and calendar registers are in the
binary-coded decimal (BCD) format. The DS3231 can be
run in either 12-hour or 24-hour mode. Bit 6 of the hours
register is defined as the 12- or 24-hour mode select bit.
When high, the 12-hour mode is selected. In the 12-hour
mode, bit 5 is the AM/PM bit with logic-high being PM. In
the 24-hour mode, bit 5 is the second 10-hour bit (20–23
Figure 1. Timekeeing Registers
Note: Unless otherwise specified, the registers’ state is not defined when power is first applied.
ADDRESS
0CH
0DH
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0EH
0FH
10H
11H
12H
2
C interface may be placed into a known state
Century
EOSC
A1M1
A1M2
A1M3
A1M4
A2M2
A2M3
A2M4
DATA
BIT 7
SIGN
SIGN
MSB
OSF
0
0
0
0
0
BBSQW
DY/DT
DY/DT
DATA
DATA
DATA
12/24
12/24
12/24
BIT 6
0
0
0
0
Clock and Calendar
10 Year
10 Seconds
10 Seconds
10 Minutes
10 Minutes
10 Minutes
10 Hour
10 Hour
10 Hour
AM/PM
AM/PM
AM/PM
Extremely Accurate I
CONV
DATA
DATA
BIT 5
0
0
0
0
10 Date
10 Date
10 Date
____________________________________________________________________
10 Month
10 Hour
10 Hour
10 Hour
DATA
DATA
BIT 4
RS2
0
0
0
EN32kHz
DATA
DATA
BIT 3
RS1
0
0
INTCN
hours). The century bit (bit 7 of the month register) is tog-
gled when the years register overflows from 99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when
the internal registers update. When reading the time and
date registers, the user buffers are synchronized to the
internal registers on any START and when the register
pointer rolls over to zero. The time information is read
from these secondary registers, while the clock contin-
ues to run. This eliminates the need to reread the regis-
ters in case the main registers update during a read.
DATA
DATA
BIT 2
BSY
Seconds
Seconds
Minutes
Minutes
Minutes
0
Month
Hour
Hour
Hour
Date
Year
Date
Date
Day
Day
DATA
DATA
BIT 1
A2IE
A2F
Day
0
RTC/TCXO/Crystal
DATA
DATA
BIT 0
A1IE
LSB
A1F
0
2
Alarm 1 Seconds
Alarm 1 Minutes
Alarm 2 Minutes
C-Integrated
Alarm 1 Hours
Alarm 2 Hours
Control/Status
MSB of Temp
Alarm 1 Date
Alarm 2 Date
LSB of Temp
Aging Offset
Alarm 1 Day
Alarm 2 Day
FUNCTION
Seconds
Minutes
Century
Control
Month/
Hours
Date
Year
Day
1–12 + AM/PM
1–12 + AM/PM
1–12 + AM/PM
RANGE
01–12 +
Century
00–59
00–59
00–23
00–31
00–99
00–59
00–59
00–23
00–59
00–23
1–31
1–31
1–7
1–7
1–7
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