SST29EE010-70-4C-EH SST [Silicon Storage Technology, Inc], SST29EE010-70-4C-EH Datasheet

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SST29EE010-70-4C-EH

Manufacturer Part Number
SST29EE010-70-4C-EH
Description
1 Mbit (128K x8) Page-Write EEPROM
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet

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Part Number:
SST29EE010-70-4C-EH
Manufacturer:
SST
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3 500
Part Number:
SST29EE010-70-4C-EH
Manufacturer:
SST
Quantity:
20 000
FEATURES:
• Single Voltage Read and Write Operations
• Superior Reliability
• Low Power Consumption
• Fast Page-Write Operation
• Fast Read Access Time
• Latched Address and Data
PRODUCT DESCRIPTION
The SST29EE/VE010 are 128K x8 CMOS Page-Write
EEPROMs manufactured with SST’s proprietary, high-per-
formance CMOS SuperFlash technology. The split-gate
cell design and thick-oxide tunneling injector attain better
reliability and manufacturability compared with alternate
approaches. The SST29EE/VE010 write with a single
power supply. Internal Erase/Program is transparent to the
user. The SST29EE/VE010 conform to JEDEC standard
pinouts for byte-wide memories.
Featuring high performance Page-Write, the SST29EE/
VE010 provide a typical Byte-Write time of 39 µsec. The
entire memory, i.e., 128 Kbyte, can be written page-by-
page in as little as 5 seconds, when using interface features
such as Toggle Bit or Data# Polling to indicate the comple-
tion of a Write cycle. To protect against inadvertent write,
the SST29EE/VE010 have on-chip hardware and Software
Data Protection schemes. Designed, manufactured, and
tested for a wide spectrum of applications, the SST29EE/
VE010 are offered with a guaranteed Page-Write endur-
ance of 10,000 cycles. Data retention is rated at greater
than 100 years.
©2005 Silicon Storage Technology, Inc.
S71061-11-000
1
– 4.5-5.5V for SST29EE010
– 2.7-3.6V for SST29VE010
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Current: 20 mA (typical) for 5V and
– Standby Current: 10 µA (typical)
– 128 Bytes per Page, 1024 Pages
– Page-Write Cycle: 5 ms (typical)
– Complete Memory Rewrite: 5 sec (typical)
– Effective Byte-Write Cycle Time: 39 µs (typical)
– 4.5-5.5V operation: 70 and 90 ns
– 2.7-3.6V operation: 150 and 200 ns
1 Mbit (128K x8) Page-Write EEPROM
SST29EE / VE0101Mb (x8) Page-Write, Small-Sector flash memories
9/05
10 mA (typical) for 2.7V
SST29EE010 / SST29VE010
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Automatic Write Timing
• End of Write Detection
• Hardware and Software Data Protection
• Product Identification can be accessed via
• TTL I/O Compatibility
• JEDEC Standard
• Packages Available
• All non-Pb (lead-free) devices are RoHS compliant
The SST29EE/VE010 are suited for applications that
require convenient and economical updating of pro-
gram, configuration, or data memory. For all system
applications,
improve performance and reliability, while lowering
power consumption. The SST29EE/VE010 improve
flexibility while lowering the cost for program, data, and
configuration storage applications.
To meet high density, surface mount requirements, the
SST29EE/VE010 are offered in 32-lead PLCC and 32-lead
TSOP packages. A 600-mil, 32-pin PDIP package is also
available. See Figures 1, 2, and 3 for pin assignments.
Device Operation
The SST Page-Write EEPROM offers in-circuit electrical
write capability. The SST29EE/VE010 does not require
separate Erase and Program operations. The internally
timed Write cycle executes both erase and program trans-
parently to the user. The SST29EE/VE010 have industry
standard optional Software Data Protection, which SST
recommends always to be enabled. The SST29EE/VE010
are compatible with industry standard EEPROM pinouts
and functionality.
– Internal V
– Toggle Bit
– Data# Polling
Software Operation
– Flash EEPROM Pinouts and command sets
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm, 8mm x 20mm)
– 32-pin PDIP
PP
the
Generation
These specifications are subject to change without notice.
SSF is a trademark of Silicon Storage Technology, Inc.
SST29EE/VE010
Data Sheet
significantly

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SST29EE010-70-4C-EH Summary of contents

Page 1

... Mbit (128K x8) Page-Write EEPROM SST29EE010 / SST29VE010 SST29EE / VE0101Mb (x8) Page-Write, Small-Sector flash memories FEATURES: • Single Voltage Read and Write Operations – 4.5-5.5V for SST29EE010 – 2.7-3.6V for SST29VE010 • Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention • ...

Page 2

... Write cycle. During the Erase operation, the only valid read is Toggle Bit. See Table 4 for the load sequence, Figure 10 for timing diagram, and Figure 19 for the flowchart Mbit Page-Write EEPROM SST29EE010 / SST29VE010 through A . Any byte 7 16 S71061-11-000 ...

Page 3

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Write Operation Status Detection The SST29EE/VE010 provide two software means to detect the completion of a Write cycle, in order to optimize the system Write cycle time. The software detection includes two status bits: Data# Polling (DQ (DQ ). The End-of-Write detection mode is enabled after ...

Page 4

... See Table 4 for software command codes, Figure 12 for timing waveform, and Figure 18 for a flowchart. X-Decoder Y-Decoder and Page Latches Control Logic I/O Buffers and Data Latches 4 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 I RODUCT DENTIFICATION Address Data 0000H BFH 0001H ...

Page 5

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 FIGURE SSIGNMENTS FOR A11 A13 4 A14 WE A16 10 A15 11 A12 FIGURE SSIGNMENTS FOR FIGURE SSIGNMENTS FOR ©2005 Silicon Storage Technology, Inc. ...

Page 6

... X can but no other value Device ID = 07H for SST29EE010 and 08H for SST29VE010 ©2005 Silicon Storage Technology, Inc. Functions To provide memory addresses. Row addresses define a page for a Write cycle. Column Addresses are toggled to load page data To output data during Read cycles and receive input data during Write cycles. ...

Page 7

... SST Manufacturer’ BFH, is read with SST29EE010 Device ID = 07H, is read with A SST29VE010 Device ID = 08H, is read with A 6. Alternate six-byte Software Product ID command code Note: This product supports both the JEDEC standard three-byte command code sequence and SST’s original six-byte command code sequence. For new designs, SST recommends that the three-byte command code sequence be used. © ...

Page 8

... C capable in both non-Pb and with-Pb solder versions. ° C for 10 seconds; please consult the factory for the latest information 4.5-5.5V 4.5-5. 2.7-3.6V 2.7-3.6V = 100 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 +0.5V DD +2.0V DD S71061-11-000 9/05 ...

Page 9

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 TABLE PERATING HARACTERISTICS Symbol Parameter I Power Supply Current DD Read Program and Erase I Standby V Current SB1 DD (TTL input) I Standby V Current SB2 DD (CMOS input) I Input Leakage Current LI I Output Leakage Current LO V Input Low Voltage IL V Input High Voltage ...

Page 10

... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2005 Silicon Storage Technology, Inc OWER UP IMINGS Minimum Specification 10,000 100 100 10 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Minimum Units 100 µ T7.1 1061 Test Condition Maximum I/O ...

Page 11

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 AC CHARACTERISTICS TABLE 10 EAD YCLE IMING Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output ...

Page 12

... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2005 Silicon Storage Technology, Inc. P IMING ARAMETERS SST29EE010 Min 0.05 200 12 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 SST29LE/VE010 Max Min Max Units ...

Page 13

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 ADDRESS A 16-0 CE# OE WE# HIGH-Z DQ 7-0 FIGURE EAD YCLE IMING Three-Byte Sequence for Enabling SDP ADDRESS A 16-0 5555 2AAA CE# OE# WE SW0 SW1 FIGURE 5: WE# C ONTROLLED ©2005 Silicon Storage Technology, Inc OLZ ...

Page 14

... DATA VALID T DS SW2 BYTE 0 BYTE AGE RITE YCLE IMING IAGRAM OEH BLCO D IAGRAM 14 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 T BLCO T WC BYTE 127 1061 F06.0 T OES D D# 1061 F07.0 S71061-11-000 9/05 ...

Page 15

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 ADDRESS A 16-0 CE# T OEH OE# WE FIGURE OGGLE IT IMING ADDRESS A 14-0 5555 DQ 7-0 AA CE# OE WE# SW0 FIGURE OFTWARE ATA ©2005 Silicon Storage Technology, Inc BLCO D IAGRAM Six-Byte Sequence for Disabling Software Data Protection ...

Page 16

... T BLC SW1 SW2 SW3 T D RASE IMING IAGRAM 5555 0000 IDA T BLC DEVICE ID = 07H for SST29EE010 SW1 SW2 = 08H for SST29VE010 R EAD 16 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 T SCE 5555 10 T BLCO SW4 SW5 1061 F10.0 0001 DEVICE ID 1061 F11 ...

Page 17

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Three-Byte Sequence for Software ID Exit and Reset ADDRESS A 14-0 5555 DQ 7-0 AA CE# OE WE# SW0 FIGURE 12 OFTWARE XIT AND ©2005 Silicon Storage Technology, Inc. 2AAA 5555 IDA T BLC SW1 SW2 R ESET 17 Data Sheet 1061 F12.0 ...

Page 18

... V LT (0.4 V) for a logic “0”. Measurement reference points for ILT (0.8 V). Input rise and fall times (10 EFERENCE AVEFORMS TO TESTER LOW 18 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 V HT OUTPUT V LT 1061 F13.0 ↔ 90%) are <10 ns. Note Test HT HIGH Test ...

Page 19

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 See Figure 17 FIGURE 15 RITE LGORITHM ©2005 Silicon Storage Technology, Inc. Start Software Data Protect Write Command Set Page Address Set Byte Address = 0 Load Byte Data Increment Byte Address By 1 Byte No Address = 128? Yes Wait T BLCO ...

Page 20

... Page-Write Initiated Read a byte from page Read same byte No Does DQ 6 match? Yes Write Completed 20 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Data# Polling Page-Write Initiated Read DQ 7 (Data for last byte loaded true data? Yes Write Completed 1061 F16.0 ...

Page 21

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Software Data Protect Enable Command Sequence Write data: AAH Address: 5555H Write data: 55H Address: 2AAAH Write data: A0H Address: 5555H Load 0 to 128 Bytes of page data Wait T BLCO Wait T WC SDP Enabled FIGURE 17 OFTWARE ATA © ...

Page 22

... Silicon Storage Technology, Inc. Software Product ID Exit & Reset Command Sequence Write data: AAH Address: 5555H Write data: 55H Address: 2AAAH Write data: F0H Address: 5555H Pause 10 µs Return to normal operation C F OMMAND LOWCHARTS 22 1 Mbit Page-Write EEPROM SST29EE010 / SST29VE010 1061 F18.0 S71061-11-000 9/05 ...

Page 23

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 FIGURE 19 OFTWARE HIP ©2005 Silicon Storage Technology, Inc. Software Chip-Erase Command Sequence Write data: AAH Address: 5555H Write data: 55H Address: 2AAAH Write data: 80H Address: 5555H Write data: AAH Address: 5555H Write data: 55H ...

Page 24

... Device Density 010 = 1 Mbit Function E = Page-Write Voltage E = 4.5-5. 2.7-3.6V Product Series 29 = Page-Write Flash 1. Environmental suffix “E” denotes non-Pb solder. SST non-Pb solder devices are “RoHS Compliant” Mbit Page-Write EEPROM SST29EE010 / SST29VE010 S71061-11-000 9/05 ...

Page 25

... Note: The software Chip-Erase function is not supported by the industrial temperature part. Please contact SST if this function is required in an industrial temperature part. ©2005 Silicon Storage Technology, Inc. SST29EE010-70-4C-EH SST29EE010-70-4C-PH SST29EE010-70-4C-EHE SST29EE010-70-4C-PHE SST29EE010-90-4C-EH SST29EE010-90-4C-PH SST29EE010-90-4C-EHE SST29EE010-70-4I-EH ...

Page 26

... SIDE VIEW .112 .106 .029 .040 .020 R. x 30˚ .023 .030 MAX. .021 .013 .400 .032 BSC .026 .050 BSC .015 Min. .095 .075 .140 .125 (PLCC Mbit Page-Write EEPROM SST29EE010 / SST29VE010 BOTTOM VIEW R. .530 .490 .032 .026 32-plcc-NH-3 S71061-11-000 9/05 ...

Page 27

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Pin # 1 Identifier 12.50 12.30 0.70 0.50 14.20 13.80 Note: 1. Complies with JEDEC publication 95 MO-142 BA dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0 Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. 32 ...

Page 28

... LEAD HIN MALL UTLINE SST ACKAGE ODE ©2005 Silicon Storage Technology, Inc. 18.50 18.30 20.20 19.80 (TSOP ACKAGE Mbit Page-Write EEPROM SST29EE010 / SST29VE010 1.05 0.95 0.50 BSC 8.10 0.27 7.90 0.17 0.15 0.05 DETAIL 1.20 max. 0.70 0.50 1mm 32-tsop-EH-7 S71061-11-000 0˚- 5˚ 9/05 ...

Page 29

... Mbit Page-Write EEPROM SST29EE010 / SST29VE010 Pin #1 Identifier .075 .065 Base Plane Seating Plane .050 .015 .080 .065 .070 .045 Note: 1. Complies with JEDEC publication 95 MO-015 AP dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in inches (max/min). 3. Dimensions do not include mold flash. Maximum allowable mold flash is .010 inches. ...

Page 30

... Removed 3V device and associated MPNs: refer to EOL Product Data Sheet S71061(01) • Added non-Pb MPN for SST29EE010 PDIP • Added RoHS compliance information on page 1 and in the “Product Ordering Information” on page 24 • Updated the solder reflow temperature to the “Absolute Maximum Stress Ratings” on page 8. Silicon Storage Technology, Inc. • ...

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