IDT72V01 IDT [Integrated Device Technology], IDT72V01 Datasheet - Page 6

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IDT72V01

Manufacturer Part Number
IDT72V01
Description
3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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IDT72V01/72V02/72V03/72V04 3.3 VOLT CMOS ASYNCHRONOUS FIFO
512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9
low after 512/1024/2048/4096 writes to the IDT72V01/72V02/
72V03/72V04.
EMPTY FLAG (
operations, when the read pointer is equal to the write pointer,
indicating that the device is empty.
EXPANSION OUT/HALF-FULL FLAG (
when Expansion In (
NOTES:
1.
2.
EF
W
The Empty Flag (
This is a dual-purpose output. In the single device mode,
and
,
FF
,
R
HF
= V
HF, FF
may change status during Reset, but flags will be valid at t
Q
D
IH
0
0
RS
EF
around the rising edge of
– Q
– D
W
R
EF EF
W
R
8
8
)
EF
XI
) is grounded, this output acts as an
) will go low, inhibiting further read
t
RLZ
t
RS
A
t
.
WPW
Figure 3. Asynchronous Write and Read Operation
XO
XO
t
/
RC
HF HF
t
DATA OUT VALID
DATA IN VALID
WC
t
)
DS
t
RR
Figure 2. Reset
t
DV
t
DH
t
t
RSC
t
RSC
t
WR
5.08
RS
RSS
t
HFH
.
indication of a half-full memory.
the next write operation, the Half-Full Flag (
and will remain set until the difference between the write
pointer and read pointer is less than or equal to one half of the
total memory of the device. The Half-Full Flag (
reset by using rising edge of the read operation.
nected to Expansion Out (
output acts as a signal to the next device in the Daisy Chain
by providing a pulse to the next device when the previous
device reaches the last location of memory.
t
t
RSS
EFL
t
, t
After half of the memory is filled and at the falling edge of
In the Depth Expansion Mode, Expansion In (
A
FFH
t
RPW
DATA OUT VALID
DATA IN VALID
t
RHZ
t
COMMERCIAL TEMPERATURE RANGE
RSR
XO
) of the previous device. This
2679 drw 04
2679 drw 05
HF
) will be set low
HF
XI
) is con-
) is then
6

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