MC14012BCPG ON Semiconductor, MC14012BCPG Datasheet - Page 6

• Manufacturer Part Number: MC14012BCPG
• Description: IC GATE NAND DUAL CMOS 14DIP
• Manufacturer: ON Semiconductor
• Series: 4000Br

Specifications of MC14012BCPG

• Logic Type: NAND Gate
• Number Of Inputs: 4
• Number Of Circuits: 2
• Current - Output High, Low: 3.4mA, 3.4mA
• Voltage - Supply: 3 V ~ 18 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 14-DIP (0.300", 7.62mm)
• Circuit Type: Low-Power Schottky
• Current, Supply: 30 μA
• Function Type: 2-Channels, 4-Inputs
• Logic Function: NAND Gate
• Package Type: PDIP-14
• Special Features: Buffered Output
• Temperature, Operating, Range: -55 to +125 °C
• Voltage, Supply: 3 to 18 VDC
• Logic Family: 4000
• Logical Function: NAND
• Number Of Elements: 2
• High Level Output Current: -4.2mA
• Low Level Output Current: 4.2mA
• Propagation Delay Time: 100ns
• Operating Supply Voltage (typ): 3.3/5/9/12/15V
• Operating Temp Range: -55C to 125C
• Number Of Outputs: 1
• Technology: CMOS
• Mounting: Through Hole
• Pin Count: 14
• Operating Temperature Classification: Military
• Quiescent Current: 1uA
• Operating Supply Voltage (max): 18V
• Operating Supply Voltage (min): 3V
• Output Current: 8.8mA
• No. Of Inputs: 4
• Supply Voltage Range: 3V To 18V
• Logic Case Style: DIP
• No. Of Pins: 14
• Operating Temperature Range: -55°C To +125°C
• Filter Terminals: DIP
• Rohs Compliant: Yes
• Family Type: 4000 CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC14012BCPGOS

3.0
1.0
5.0
4.0
2.0
8.0
6.0
2.0
4.0
16
10
14
12
0
0
0
0
1.0
2.0
Figure 13. V
V
2.0
4.0
V
in
Figure 11. V
in
, INPUT VOLTAGE (Vdc)
, INPUT VOLTAGE (Vdc)
V
V
V
out
O
O
3.0
6.0
0
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
(a) Inverting Function
V
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
DD
4.0
DD
8.0
DD
= 15 Vdc
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
V
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, A
IL
= 5.0 Vdc
5.0
10
VOLTAGE TRANSFER CHARACTERISTICS
V
Figure 14. DC Noise Immunity
IH
http://onsemi.com
V
V
V
DD
in
SS
MC14012B
= 0 VOLTS DC
6
from an ideal “1” or “0” input level which does not produce
output state change(s). The typical and guaranteed limit
values of the input values V
be at a fixed voltage V
Characteristics table. V
in Figure 11.
“0” levels =
The DC noise margin is defined as the input voltage range
Guaranteed minimum noise margins for both the “1” and
2.0
V
8.0
6.0
4.0
V
V
10
O
0
O
out
0
(b) Non-Inverting Function
0
1.0 V with a 5.0 V supply
2.0 V with a 10.0 V supply
2.5 V with a 15.0 V supply
V
2.0
DD
V
IL
4.0
Figure 12. V
DC NOISE MARGIN
V
in
, INPUT VOLTAGE (Vdc)
IL
6.0
and V
V
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
O
IH
IL
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
are given in the Electrical
8.0
and V
IH
DD
are presented graphically
V
V
= 10 Vdc
DD
in
10
IH
for the output(s) to