IDT7200L IDT [Integrated Device Technology], IDT7200L Datasheet - Page 10

• Manufacturer Part Number: IDT7200L
• Description: CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1,024 x 9
• Manufacturer: IDT [Integrated Device Technology]

IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
USAGE MODES:
Width Expansion
corresponding input control signals of multiple devices. Sta-
tus flags (
device. Figure 13 demonstrates an 18-bit word width by using
two IDT7200/7201A/7202As. Any word width can be attained
by adding additional IDT7200/7201A/7202As (Figure 13).
Bidirectional Operation
systems (each system capable of Read and Write operations)
can be achieved by pairing IDT7200/7201A/7202As as shown
in Figure 16. Both Depth Expansion and Width Expansion
may be used in this mode.
Data Flow-Through
flow-through and write flow-through mode. For the read flow-
through mode (Figure 17), the FIFO permits a reading of a
Word width may be increased simply by connecting the
Applications which require data buffering between two
Two types of flow-through modes are permitted, a read
EF
FULL FLAG (
,
FF
DATA
RESET (
WRITE (
Figure 13. Block Diagram of 256 x 18, 512 x 18, 1,024 x 18 FIFO Memory Used in Width Expansion Mode
and
IN
HF
RS
FF
(D)
W
)
)
)
) can be detected from any one
FULL FLAG (
18
DATA IN (D)
RESET (
Figure 12. Block Diagram of Single 256 x 9, 512 x 9, 1,024 x 9 FIFO
WRITE (
(HALF–FULL FLAG)
9
EXPANSION IN (
RS
FF
W
)
)
)
7201A/
7202A
7200/
9
IDT
HF
XI
XI
)
7201A/
7202A
7200/
(
IDT
HF
9
)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
single word after writing one word of data into an empty FIFO.
The data is enabled on the bus in (t
edge of
bus until the
bus would go into a three-state mode after t
would have a pulse showing temporary deassertion and then
would be asserted.
permits the writing of a single word of data immediately after
reading one word of data from a full FIFO. The
the
be asserted again in anticipation of a new data word. On the
rising edge of
line must be toggled when
in the FIFO and to increment the write pointer.
Compound Expansion
applied together in a straightforward manner to achieve large
FIFO arrays (see Figure 15).
9
In the write flow-through mode (Figure 18), the FIFO
The two expansion techniques described above can be
FF
9
to be deasserted but the
W
7201A/
7202A
7200/
, called the first write edge, and it remains on the
HF
IDT
R
W
READ (
RETRANSMIT (
line is raised from low-to-high, after which the
DATA OUT (Q)
EMPTY FLAG (
XI
, the new word is loaded in the FIFO. The
R
9
)
2679 drw 14
FF
18
is not asserted to write new data
EF
RT
)
)
W
WEF
DATA
line being low causes it to
READ (
EMPTY FLAG (
RETRANSMIT (
+ t
OUT
A
R
RHZ
) ns after the rising
)
(Q)
ns. The
R
EF
RT
line causes
)
)
2679 drw 15
EF
10
line
W