NJU26040V-09D NJRC [New Japan Radio], NJU26040V-09D Datasheet - Page 10

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NJU26040V-09D

Manufacturer Part Number
NJU26040V-09D
Description
SRS TruSurround HD/HD4 Decoder
Manufacturer
NJRC [New Japan Radio]
Datasheet
NJU26040-09D
- 10 -
the NJU26040-09D restricts operation at power on by setting PROC pin and MUTEb pin (Table 7). These
pins are input pin. However, these pins operate as bi-directional pins. Connect with VDD or VSS through
3.3kΩ resistance.
NJU26040-09D. The WDC clock is useful to check the status of the NJU26040-09D operation. For
example, a microcomputer monitors the WDC clock and checks the status of the NJU26040-09D. When
the WDC clock pulse is lost or not normal clock cycle, the NJU26040-09D does not operate correctly. Then
reset the NJU26040-09D and set up the NJU26040-09D again.
Pin setting
WatchDog Clock
The NJU26040-09D operates default command setting after resetting the NJU26040-09D. In addition,
The NJU26040-09D outputs clock pulse through WDC (No.26) pin during normal operation. (Table 8)
The NJU26040-09D generates a clock pulse through the WDC terminal after resetting the
Table 7.
Pin No.
Table 8.
Note : If input and output of an audio signal stop and an audio interface stops, WDC can’t output.
WDC Output Cycle (Low/High) Time
28
27
That is because it has controlled based on the signal of an audio interface.
Pin setting
WatchDog Clock Output Cycle
Symbol
MUTEb
PROC
85ms
Setting
“High”
“High”
“Low”
“Low”
Function
The NJU26040-09D operates default setting after reset.
The NJU26040-09D does not operate after reset. Sending
start command is required for starting operation.
Master volume is set 0dB after reset.
Master volume is set mute after reset.
Ver.2009-02-10

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