P130-07QC PLL [PhaseLink Corporation], P130-07QC Datasheet - Page 3

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P130-07QC

Manufacturer Part Number
P130-07QC
Description
High Speed Translator Buffer to CMOS (Selectable Drive)
Manufacturer
PLL [PhaseLink Corporation]
Datasheet
3. CMOS Output Electrical Specifications
* Note: High Drive CMOS is selectable through DRIV_SEL selector input on pin 8(SOIC) or 13(QFN).
4. CMOS Switching Characteristics
* Note: High Drive CMOS is selectable through DRIV_SEL selector input on pin 8(SOIC) or 13(QFN).
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 3
Output High Voltage
Output Low Voltage
Output High Voltage at CMOS
level
Output drive current
Output Clock Rise/Fall Time
Output Clock Rise/Fall Time
(High Drive*)
PARAMETERS
PARAMETERS
SYMBOL
SYMBOL
High Speed Translator Buffer to CMOS (Selectable Drive)
V
V
V
OHC
OH
OL
I
I
I
At TTL level (High drive*)
At TTL level (Standard drive)
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
OH
LO
OH
= 12mA
= -12mA
= -4mA
CONDITIONS
CONDITIONS
V
DD
MIN.
MIN.
2.4
36
12
– 0.4
TYP.
TYP.
1.15
3.7
0.5
1.5
PLL130-07
51
17
MAX.
MAX.
0.4
UNITS
UNITS
mA
mA
ns
V
V
V

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