MC74VHC132DG ON Semiconductor, MC74VHC132DG Datasheet

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MC74VHC132DG

Manufacturer Part Number
MC74VHC132DG
Description
IC SCHMITT TRIGER NAND 14-SOIC
Manufacturer
ON Semiconductor
Series
74VHCr
Datasheet

Specifications of MC74VHC132DG

Logic Type
NAND Gate - Schmitt Trigger
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MC74VHC132
Quad 2-Input NAND Schmitt
Trigger
NAND trigger fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
but the inputs have hysteresis and, with its Schmitt trigger function,
the VHC132 can be used as a line receiver which will receive slow
input signals.
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
© Semiconductor Components Industries, LLC, 2008
July, 2008 − Rev. 4
The MC74VHC132 is an advanced high speed CMOS Schmitt
Pin configuration and function are the same as the MC74VHC00,
The internal circuit is composed of three stages, including a buffer
High Speed: t
Low Power Dissipation: I
High Noise Immunity: V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance:
Chip Complexity: 72 FETs or 18 Equivalent Gates
Pb−Free Packages are Available
Human Body Model > 2000 V;
Machine Model > 200 V
Figure 1. Pinout: 14−Lead Packages
V
14
A1
1
CC
PD
OLP
= 4.9 ns (Typ) at V
B4
B1
13
2
= 0.8 V (Max)
A4
Y1
12
3
(Top View)
NIH
CC
Y4
A2
11
= 2 mA (Max) at T
4
= V
NIL
B3
B2
10
5
CC
= 28% V
= 5.0 V
A3
Y2
9
6
GND
Y3
CC
8
7
A
= 25°C
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
1
1
(Note: Microdot may be in either loca-
tion)
1
A
Location
WL, L
Y
WW, W
G or G
ORDERING INFORMATION
http://onsemi.com
FUNCTION TABLE
A
H
H
L
L
CASE 948G
CASE 751A
SOEIAJ−14
DT SUFFIX
TSSOP−14
M SUFFIX
CASE 965
D SUFFIX
SOIC−14
Inputs
=
=
=
=
= Pb−Free Package
Publication Order Number:
B
H
H
L
L
Assembly
Wafer Lot
Year
Work Week
14
14
1
1
Output
14
DIAGRAMS
1
MC74VHC132/D
Y
H
H
H
L
MARKING
AWLYWW
VHC132G
VHC132
ALYWG
ALYWG
VHC
132
G

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MC74VHC132DG Summary of contents

Page 1

MC74VHC132 Quad 2-Input NAND Schmitt Trigger The MC74VHC132 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. ...

Page 2

Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î MAXIMUM RATINGS Î Î Î Î Î Î Î ...

Page 3

DC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 4

... ORDERING INFORMATION Device MC74VHC132D MC74VHC132DG MC74VHC132DR2 MC74VHC132DR2G MC74VHC132DTR2 M74VHC132DTR2G MC74VHC132MEL MC74VHC132MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Package SOIC−14 SOIC−14 (Pb− ...

Page 5

A t PLH 50 Figure 3. Switching Waveforms Figure 5. Typical Input Threshold, V (a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times ...

Page 6

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 7

... −V− C 0.10 (0.004) −T− G SEATING D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 DT SUFFIX CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 8

... Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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