CC2530F128 APLUS [Aplus Intergrated Circuits], CC2530F128 Datasheet - Page 12

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CC2530F128

Manufacturer Part Number
CC2530F128
Description
A True System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee Applications
Manufacturer
APLUS [Aplus Intergrated Circuits]
Datasheet

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CC2530F32, CC2530F64, CC2530F128, CC2530F256
SWRS081A – APRIL 2009 – REVISED APRIL 2009
DEBUG INTERFACE AC CHARACTERISTICS
T
12
DEBUG _ CLK
f
t
t
t
t
t
t
t
t
clk_dbg
1
2
3
4
5
6
7
8
A
= –40°C to 125°C, VDD = 2 V to 3.6 V, unless otherwise noted.
RESET _N
P2_2
Submit Documentation Feedback
Debug clock frequency (see
Allowed high pulse on clock (see
Allowed low pulse on clock (see
EXT_RESET_N low to first falling edge on
debug clock (see
Falling edge on clock to EXT_RESET_N high
(see
EXT_RESET_N high to first debug command
(see
Debug data setup (see
Debug data hold (see
Clock-to-data delay (see
DEBUG _ CLK
Figure
Figure
P2_2
PARAMETER
4)
4)
Figure
Product Folder Link(s):
t
Figure
3
Figure
4)
Figure
Figure
5)
5)
5)
Figure
Figure
..........................................................................................................................................................
Figure 3. Debug Clock – Basic Timing
Figure 4. Data Setup and Hold Timing
3)
t
1
3)
3)
CC2530F32 CC2530F64 CC2530F128 CC2530F256
1/f
clk_dbg
Load = 10 pF
TEST CONDITIONS
t
2
t
4
t
5
Copyright © 2009, Texas Instruments Incorporated
MIN
167
35
35
83
83
2
4
TYP
Time
T0436-01
MAX
12
30
www.ti.com
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Time
T0437-01

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