M25P10-AVMB3/X NUMONYX [Numonyx B.V], M25P10-AVMB3/X Datasheet - Page 50
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M25P10-AVMB3/X
Manufacturer Part Number
M25P10-AVMB3/X
Description
1 Mbit, serial Flash memory, 50 MHz SPI bus interface
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.M25P10-AVMB3X.pdf
(51 pages)
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Revision history
50/51
Table 25.
23-Aug-2007
10-Dec-2007
05-Jun-2006
18-Oct-2007
06-Jul-2007
Date
Document revision history (continued)
Revision
10
11
7
8
9
t
“X” process technology in
SO8 narrow package specifications updated (see
Table
Changed the minimum value for supply voltage.
Added T
maximum
Updated
memory devices on the SPI
Note 1 to
Note 2 below
Changed test condition for I
Removed “low voltage” from the title. Small text changes.
Typical values for Sector Erase and Bulk Erase modified.
UFDFPN8 package (MLP8) added.
Added the reference to a new process technology (code “Y”).
Added notes below
characteristics (device grade
grade
/Y process added to
Code of the UFDFPN8 package modified.
Small text changes.
Applied Numonyx branding.
RES1
and t
21).
3).
LEAD
Section 3: SPI modes
Table 13: Capacitance
ratings.
RES2
and changed maximum value for V
Table 16: Instruction times (device grade 6)
parameter timings changed for devices produced with the
Table 10: Operating
Table 24: Ordering information
Table 18
CC3
bus.
3), and
and modified
Changes
in
changed.
Table 14
and
Table 17: Instruction times (device
Table
conditions,
and f
Figure 3: Bus master and
19.
R
IO
Figure 26
in
in
Table 15: DC
scheme.
Table
Table 9: Absolute
added.
20.
and
M25P10-A
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