GTL2003 Philips Semiconductors (Acquired by NXP), GTL2003 Datasheet - Page 5

• Manufacturer Part Number: GTL2003
• Manufacturer: Philips Semiconductors (Acquired by NXP)

NXP Semiconductors
8. Application design-in information
GTL2003_1
Product data sheet
8.1 Bidirectional translation
For the bidirectional clamping configuration, higher voltage to lower voltage or lower
voltage to higher voltage, the GREF input must be connected to DREF and both pins
pulled to HIGH side V
DREF is recommended. The processor output can be totem pole or open-drain (pull-up
resistors may be required) and the chip set output can be totem pole or open-drain
(pull-up resistors are required to pull the Dn outputs to V
totem pole, data must be unidirectional or the outputs must be 3-stateable and the outputs
must be controlled by some direction control mechanism to prevent HIGH-to-LOW
contentions in either direction. If both outputs are open-drain, no direction control is
needed. The opposite side of the reference transistor (SREF) is connected to the
processor core power supply voltage. When DREF is connected through a 200 k resistor
to a 3.3 V to 5.5 V V
of each Sn has a maximum output voltage equal to SREF and the output of each Dn has
a maximum output voltage equal to V
Fig 4. Bidirectional translation to multiple higher voltage levels such as an I
1.8 V
1.5 V
1.2 V
1.0 V
Typical bidirectional voltage translation.
application
V
CORE
CPU I/O
CC
CC
supply and SREF is set between 1.0 V to (V
Rev. 01 — 27 July 2007
through a pull-up resistor (typically 200 k ). A filter capacitor on
CC
GND
SREF
S1
S2
S3
S4
S5
Sn
.
GTL2002
increase bit size
by using 8-bit GTL2003,
10-bit GTL2010,
or 22-bit GTL2000
GREF
DREF
8-bit bidirectional low voltage translator
D1
D2
D3
D4
D5
Dn
200 k
CC
). However, if either output is
CC
CHIPSET I/O
CHIPSET I/O
GTL2003
© NXP B.V. 2007. All rights reserved.
1.5 V), the output
V
V
CC
CC
002aac642
2
5 V
totem pole or
open-drain I/O
3.3 V
C-bus
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