cxm3560xr Sony Electronics, cxm3560xr Datasheet

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cxm3560xr

Manufacturer Part Number
cxm3560xr
Description
Sp10t Antenna Switch For Gsm/umts Dual Mode Handsets
Manufacturer
Sony Electronics
Datasheet
SP10T Antenna Switch for GSM/UMTS Dual Mode Handsets
Description
Features
Structure
Absolute Maximum Ratings
The CXM3560XR is SP10T antenna switch for GSM/UMTS dual mode handsets.
The CXM3560XR has a 1.8V CMOS compatible decoder.
The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity.
(Applications: GSM (4bands) and UMTS (4bands) Dual-Mode Handsets)
GaAs Junction Gate pHEMT (JPHEMT) MMIC Switch, CMOS Decoder
(Ta = 25
Note on Handling
GaAs MMIC’s are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license
by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating
the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Low Insertion Loss:
Low Voltage Operation:V
No DC Blocking Capacitors required on RF ports
Small package size: XQFN-24P-02 (2.2mm × 2.9mm × 0.4mm Max.)
Lead-Free and RoHS Compliant
Bias voltage
Control voltage (CTL-A/B/C/D)
Input power max. [Tx1]
Input power max. [Tx2]
Input power max. [TRx1, 2, 3, 4]
Input power max. [Rx1, 2, 3, 4]
Operating temperature range
Storage temperature range
°
C)
0.30dB (Typ.) Tx1 (GSM Low Band Tx)
0.45dB (Typ.) Tx2 (GSM High Band Tx)
0.60dB (Typ.) TRx1 (UMTS Band I)
DD
= 2.5V
V
Vctl
DD
- 1 -
–65 to +150
–35 to +85
36
34
32
13
4
4
CXM3560XR
V
V
dBm (Duty cycle = 12.5 to 50%)
dBm (Duty cycle = 12.5 to 50%)
dBm
dBm
°
°
C
C
E09411

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cxm3560xr Summary of contents

Page 1

... SP10T Antenna Switch for GSM/UMTS Dual Mode Handsets Description The CXM3560XR is SP10T antenna switch for GSM/UMTS dual mode handsets. The CXM3560XR has a 1.8V CMOS compatible decoder. The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity. ...

Page 2

Block Diagram SP10T Antenna Switch Ant Pin Configuration Decoder Logic GND 13 Rx1 14 Rx2 15 24-pin XQFN (2.2mm × 2.9mm Rx3 16 × 0.4mm Max.) Top View Rx4 17 TRx1 18 GND 19 20 ...

Page 3

Pin Description Pin No. Name 1 GND 2 TRx2 3 GND 4 TRx3 5 GND 6 TRx4 7 GND 8 Ant 9 GND 10 Tx2 (DCS/PCS) 11 GND 12 Tx1 (GSM850/900M) Pin No. Name 13 GND 14 Rx1 15 Rx2 ...

Page 4

RF Switch Ant F1 F2 Tx1 Tx2 Truth Table Vctl State Active State Path Tx1 Tx2 Rx1 4 Rx2 Rx3 L ...

Page 5

Electrical Characteristics Supply Voltage Value ( ° Item Min. Bias voltage (V ) +2.5 DD Logic Value ( ° Item State High Control voltage (CTL-A/B/C/D) Low Typ. Max. Unit +2.65 +3.3 V Min. Typ. ...

Page 6

Specification 1 ( 2.5V, Vctl = 1.5V) ° DD Item Symbol Ant-Tx1 Ant-Tx2 Ant-Rx1 Ant-Rx2 Ant-Rx3 Ant-Rx4 Ant-TRx1 Insertion loss IL Ant-TRx2 Ant-TRx3 Ant-TRx4 VSWR VSWR All ports in Active Paths 2fo Tx1-Ant 3fo 2fo ...

Page 7

Item Symbol TRx1-Ant TRx2-Ant IMD2 TRx3-Ant Inter modulation TRx4-Ant product power TRx1-Ant in Rx band TRx2-Ant IMD3 TRx3-Ant TRx4-Ant Switching time Ts Control current Ictl Supply current Idd Electrical Characteristics are measured with all RF ports terminated in 50Ω. Pin ...

Page 8

Specification 1-Isolation ( 2.5V, Vctl = 1.5V) ° DD Item Symbol Active Tx1 Isolation ISO Tx2 TRx1 Path Condition Isolation Tx1-Rx1 Tx1-Rx2 Tx1-Rx3 Tx1-Rx4 Tx1-TRx1 824 to 915MHz Tx1-TRx2 Tx1-TRx3 Tx1-TRx4 Tx1-Tx2 Tx1-Tx2 1648 to ...

Page 9

Item Symbol Active TRx2 Isolation ISO TRx3 TRx4 Electrical Characteristics are measured with all RF ports terminated in 50Ω. Path Condition Isolation TRx2-Rx1 TRx2-Rx2 TRx2-Rx3 TRx2-Rx4 TRx2-TRx1 824 to 849MHz TRx2-TRx3 TRx2-TRx4 TRx2-Tx1 TRx2-Tx2 TRx2-Rx1 TRx2-Rx2 TRx2-Rx3 TRx2-Rx4 TRx2-TRx1 1710 ...

Page 10

Recommended Circuit Rx1 Rx2 Rx3 Rx4 TRx1 Note blocking Capacitors are required on all RF ports levels of all RF ports are GND Inductor(22nH) and C1 Capacitor(22pF) are recommended on Ant port for ...

Page 11

PCB Layout Template XQFN-24P-02 Macro for MMIC (Reference) Specification • PKG size: • Terminal pitch: 0.35mm • Terminal length: 0.25mm • Mask thickness: 0.11mm : Land area : Board resist open area : PKG outline 2.9mm × 2.2mm t0.35mm 3.3 ...

Page 12

Package Outline (Unit: mm) LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS - 12 - SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18µm Sony Corporation ...

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