k7r321882m Samsung Semiconductor, Inc., k7r321882m Datasheet - Page 9
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k7r321882m
Manufacturer Part Number
k7r321882m
Description
1mx36-bit, 2mx18-bit, 4mx9-bit Qdrtm Ii B2 Sram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K7R321882M.pdf
(19 pages)
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K7R323682M
K7R321882M
K7R320982M
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
Notes: 1. X means "Don t Care".
WRITE TRUTH TABLE
Notes: 1. X means "Don t Care".
WRITE TRUTH TABLE
Notes: 1. X means "Don t Care".
Stopped
K
K
2. The rising edge of clock is symbolized by (
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (
3. Before enter into clock stop status, all pending read and write operations will be completed.
3. Assumes a WRITE cycle was initiated.
3. Assumes a WRITE cycle was initiated.
2. All inputs in this table must meet setup and hold time around the rising edge of input clock K or K (
4. This table illustates operation for x18 devices. x9 device operation is similar except that
K
R
X
H
X
L
K
K
W
X
H
X
L
(x18)
(x36)
BW
H
H
H
H
H
H
L
L
L
L
0
Previous state
Din at K(t)
BW
D(A0)
H
H
H
H
L
L
L
L
X
X
0
BW
H
H
H
H
H
H
L
L
L
L
1
).
D
1Mx36 & 2Mx18 & 4Mx9 QDR
BW
BW
Previous state
L
L
H
H
L
L
H
H
H
H
H
H
H
H
L
L
L
L
Din at K(t)
1
2
D(A1)
X
X
- 9 -
BW
H
H
H
H
H
H
L
L
L
L
3
D
Previous state
OUT
High-Z
Q(A0)
at C(t+1)
X
BW
WRITE ALL BYTEs ( K
WRITE ALL BYTEs ( K
WRITE NOTHING ( K
WRITE NOTHING ( K
WRITE BYTE 2 and BYTE 3 ( K
WRITE BYTE 2 and BYTE 3 ( K
WRITE BYTE 0 ( K
WRITE BYTE 0 ( K
WRITE BYTE 1 ( K
WRITE BYTE 1 ( K
controls D0:D8.
WRITE ALL BYTEs ( K
WRITE ALL BYTEs ( K
OPERATION
WRITE NOTHING ( K
WRITE NOTHING ( K
WRITE BYTE 0 ( K
WRITE BYTE 0 ( K
WRITE BYTE 1 ( K
WRITE BYTE 1 ( K
Q
).
).
D
OPERATION
Previous state
OUT
High-Z
Q(A1)
at C(t+2)
X
TM
II b2 SRAM
OPERATION
No Operation
Clock Stop
Read
Write
Dec. 2003
Rev 2.0