x24640 Intersil Corporation, x24640 Datasheet

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x24640

Manufacturer Part Number
x24640
Description
400khz 2-wire Serial E 2 Prom With Block Lock
Manufacturer
Intersil Corporation
Datasheet

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Part Number:
X24640
Manufacturer:
XILINX
0
FUNCTIONAL DIAGRAM
FEATURES
7038-1.2 4/25/97 T0/C2/D0 SH
64K
Xicor, 1995, 1996 Patents Pending
Save Critical Data with Programmable
Block Lock Protection
—Block Lock (0, 1/4, 1/2, or all of E
—Software Program Protection
—Programmable Hardware Write Protect
In Circuit Programmable ROM Mode
400KHz 2-Wire Serial Interfac
—Schmitt Trigger Input Noise Suppression
—Output Slope Control for Ground Bounce
Longer Battery Life With Lower Power
—Active Read Current Less Than 1mA
—Active Program Current Less Than 3mA
—Standby Current Less Than 1 A
1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V
Power Supply Versions
32 Word Page Write Mode
—Minimizes Total Write Time Per Word
Internally Organized 8K x 8
Bidirectional Data Transfer Protocol
Self-Timed Write Cycle
—Typical Write Cycle Time of 5ms
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
8-Lead SOIC
20-Lead TSSOP
8-Lead PDIP
Noise Elimination
SERIAL E
AND ADDRESS (SDA)
2
PROM DATA
SCL
400KHz 2-Wire Serial E
S2
S1
S0
WP
COMMAND
CONTROL
DECODE
SELECT
DEVICE
LOGIC
LOGIC
AND
2
PROM Array)
BLOCK LOCK AND
WRITE PROTECT
CONTROL LOGIC
X24640
2
PROM with Block Lock
1
DESCRIPTION
The X24640 is a CMOS Serial E
organized 8K x 8. The device features a serial inter-
face and software protocol allowing operation on a
simple two wire bus. The bus operates at 400 KHz all
the way down to 1.8V.
Three device select inputs (S
devices to share a common two wire bus.
A Write Protect Register at the highest address loca-
tion, FFFFh, provides three write protection features:
Software Write Protect, Block Lock Protect, and
Programmable Hardware Write Protect. The Software
Write Protect feature prevents any nonvolatile writes to
the device until the WEL bit in the Write Protect
Register is set. The Block Lock Protection feature
gives the user four array block protect options, set by
programming two bits in the Write Protect Register.
The Programmable Hardware Write Protect feature
allows the user to install the device with WP tied to
V
the memory array in circuit, and then enable the In
Circuit Programmable ROM Mode by programming the
WPEN bit in the Write Protect Register. After this, the
Block Locked portions of the array, including the Write
Protect Register itself, are permanently protected from
being erased.
REGISTER
PROTECT
CC
DECODE
WRITE
LOGIC
PAGE
, program and Block Lock the desired portions of
Y DECODE LOGIC
WRITE VOLTAGE
DATA REGISTER
SERIAL E
CONTROL
ARRAY
2K x 8
2K x 8
4K x 8
8K x 8
2
PROM
Characteristics subject to change without notice
TM
0
–S
2
) allow up to eight
2
PROM, internally
8K x 8 Bit
7038 FM 01

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x24640 Summary of contents

Page 1

... Xicor, 1995, 1996 Patents Pending 7038-1.2 4/25/97 T0/C2/D0 SH X24640 2 PROM with Block Lock DESCRIPTION The X24640 is a CMOS Serial E organized The device features a serial inter- 2 PROM Array) face and software protocol allowing operation on a simple two wire bus. The bus operates at 400 KHz all the way down to 1 ...

Page 2

... TSSOP X24640 SCL SDA 0.252" 7038 FM T01 7038 FM 02 ...

Page 3

... X24640 DEVICE OPERATION The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave ...

Page 4

... X24640 Stop Condition All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to place the device into the standby power mode after a read sequence. A stop condition can only be issued after the transmitting device has released the bus. ...

Page 5

... DEVICE TYPE DEVICE IDENTIFIER SELECT SLAVE ADDRESS BYTE HIGH ORDER WORD ADDRESS A12 A11 A10 X24640 WORD ADDRESS BYTE 1 LOW ORDER WORD ADDRESS WORD ADDRESS BYTE DATA BYTE 5 2 array is 256 pages by ...

Page 6

... X24640 WRITE OPERATIONS Byte Write For a write operation, the device requires the Slave Address Byte, the Word Address Byte 1, and the Word Address Byte 0, which gives the master access to any one of the words in the array. Upon receipt of the Word Address Byte 0, the device responds with an acknowl- edge, and waits for the fi ...

Page 7

... X24640 Acknowledge Polling The maximum write cycle time can be significantly reduced using Acknowledge Polling. To initiate Acknowledge Polling, the master issues a start condi- tion followed by the Slave Address Byte for a write or read operation. If the device is still busy with the internal write cycle, then no ACK will be returned. If the ...

Page 8

... X24640 Random Read Random read operation allows the master to access any memory location in the array. Prior to issuing the Slave Address Byte with the R/W bit set to one, the master must first perform a “Dummy” write operation. The master issues the start condition and the Slave ...

Page 9

... X24640 WRITE PROTECT REGISTER (WPR) Writing to the Write Protect Register The Write Protect Register can only be modified by performing a “Byte Write” operation directly to the address FFFFh as described below. The Data Byte must contain zeroes where indicated in the procedural descriptions below; otherwise the oper- ation will not be performed ...

Page 10

... X24640 reset, nor can RWEL and WEL be reset in one write operation. RWEL can be reset by writing 00000010 to FFFFh; but this is the same operation as in step 3 described below, and will result in programing BL0, BL1, and WPEN. Writing to the BL and WPEN Bits A 3 step sequence is required to change the nonvola- ...

Page 11

... X24640 ABSOLUTE MAXIMUM RATINGS* Temperature under Bias X24640.......................................– +135 C Storage Temperature ........................– +150 C Voltage on any Pin with Respect to V .................................... –1V to +7V SS D.C. Output Current ..............................................5mA Lead Temperature (Soldering, 10 seconds) .............................. 300 C RECOMMENDED OPERATING CONDITIONS Temperature Min. Commercial 0 C Industrial – ...

Page 12

... X24640 A.C. CONDITIONS OF TEST Input Pulse Levels V CC Input Rise and Fall Times Input and Output Timing Levels A.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions, unless otherwise specified.) Read & Write Cycle Limits Symbol f SCL Clock Frequency SCL t Noise Suppression Time I Constant at SCL, SDA Inputs ...

Page 13

... The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/ program cycle. During the write cycle, the X24640 bus interface circuits are disabled, SDA is allowed to remain HIGH, and the device does not respond to its slave address. ...

Page 14

... X24640 PACKAGING INFORMATION 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S 0.010 (0.25) 0.020 (0.50) 0 – 8 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) PIN 1 INDEX PIN 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7 0.050 (1.27 0.0075 (0.19) 0.010 (0.25) 14 0.150 (3.80) 0.228 (5.80) 0.158 (4.00) 0.244 (6.20) ...

Page 15

... X24640 PACKAGING INFORMATION 20-LEAD PLASTIC, TSSOP PACKAGE TYPE V 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .252 (6.4) .260 (6.6) .047 (1.20) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) Gage Plane Seating Plane .019 (.50) ...

Page 16

... X24640 PACKAGING INFORMATION 8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL 0.015 (0.38) MAX. TYP . 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 0.430 (10.92) 0.360 (9.14) PIN 1 INDEX PIN 1 0.300 (7.62) REF. SEATING PLANE 0.150 (3.81) ...

Page 17

... Temperature Range Blank = + – +85 C Package X24640 S8 = 8-Lead SOIC V20 = 20-Lead TSSOP P = 8-Lead PDIP X24640 X Blank = 8-Lead SOIC V = 20-Lead TSSOP P = 8-Lead PDIP X Blank = 4.5V to 5.5V + 4.5V to 5.5V, – + 2.5V to 5.5V + 2.5V to 5.5V, – + 1.8V to 3.6V + 1.8V to 3.6V, – ...

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