h55s1g62mfp-60 Hynix Semiconductor, h55s1g62mfp-60 Datasheet - Page 5

• Manufacturer Part Number: h55s1g62mfp-60
• Description: 64mx16bit Mobile Sdram
• Manufacturer: Hynix Semiconductor

FEATURES
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1Gb SDRAM ORDERING INFORMATION
Rev 1.2 / Jul. 2008
- All the commands registered on positive edge of basic input clock (CLK)
- During burst Read or Write operation, burst Read or Write for a different bank is performed.
- During burst Read or Write operation, a different bank is activated and burst Read or Write
- During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
- Programmable PASR(Partial Array Self Refresh)
- Auto TCSR (Temperature Compensated Self Refresh)
- Programmable DS (Drive Strength)
- Deep Power Down Mode
- -30
- 54 Ball Lead Free FBGA
Standard SDRAM Protocol
Clock Synchronization Operation
MULTIBANK OPERATION - Internal 4bank operation
Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V
LVCMOS compatible I/O Interface
Low Voltage interface to reduce I/O power
Programmable burst length: 1, 2, 4, 8 or full page
Programmable Burst Type : sequential or interleaved
Programmable CAS latency of 2 or 3
Programmable Drive Strength
Low Power Features
Operation Temperature
Package
for that bank is performed
H55S1G62MFP-60
H55S1G62MFP-75
H55S1G62MFP-A3
Part Number
o
C ~ 85
o
C
Clock Frequency
166MHz
133MHz
105MHz
Latency
CAS
3
3
3
1Gbit (64Mx16bit) Mobile SDR Memory
4banks x 16Mb x 16
Organization
H55S1G62MFP Series
Interface
LVCMOS
54 Ball FBGA
Package
11
5