ta1318afg TOSHIBA Semiconductor CORPORATION, ta1318afg Datasheet - Page 17

• Manufacturer Part Number: ta1318afg
• Description: Sync Processor, Frequency Counter Ic For Tv Component Signals
• Manufacturer: TOSHIBA Semiconductor CORPORATION

I
2
C BUS Conditions
Data Transmit Format 1
Data Transmit Format 2
Data Receive Format
Optional Data Transmit Format: Automatic Increment Mode
Low level input voltage
High level input voltage
Low level output voltage at 3 mA sink current
Input current each I/O pin with an input voltage
between 0.1 VDD and 0.9 VDD
Capacitance for each I/O pin
SCL clock frequency
Hold time START condition
Low period of SCL clock
High period of SCL clock
Set-up time for a repeated START condition
Data hold time
Data set-up time
Set-up time for STOP condition
Bus free time between a STOP and START condition
transmitter. This acknowledge is still generated by this slave.
(* important) The data read from THIS IC should always be completed in whole two words, not one word,
sub-address.
S: Start condition
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave
The Stop condition is generated by the master.
In this transmission method, data is set on automatically incremented sub-address from the specified
S
S
S
S
MSB
MSB
MSB
Slave address
Slave address
Slave address
Slave address
7 bit
Characteristics
7 bit
7 bit
otherwise the IICBUS may cause error.
0
0 A
0 A
1 A
A: Acknowledge
A 1
MSB
MSB
MSB
･･････
Received data 1
Sub address
Sub address
Sub address
8 bit
8 bit
7 bit
Sub address
t
t
Symbol
t
t
t
A
A
A
HD;STA
SU;STA
HD;DAT
SU;DAT
SU;STO
t
V
t
f
t
HIGH
LOW
V
BUF
V
SCL
OL1
C
17
MSB
A
I
IH
IL
i
i
Received data 2
MSB
Transmit data
Transmit data
Transmit data 1
A
8 bit
8 bit
Min
−10
280
250
3.0
4.0
4.7
4.0
4.7
4.0
4.7
Transmit data n
⎯
0
0
0
Typ.
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
A P
A P
A
P: Stop condition
････
･･････
Max
Vcc
100
1.5
0.4
10
10
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
MSB
A P
Transmit data 2
Unit
kHz
8 bit
µA
pF
µs
µs
µs
µs
ns
ns
µs
µs
V
V
V
TA1318AFG
A P
2006-02-27