psb4595 ETC-unknow, psb4595 Datasheet - Page 45

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psb4595

Manufacturer Part Number
psb4595
Description
Analog Line Interface Solution Alis
Manufacturer
ETC-unknow
Datasheet

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For XOP Read Commands
Default value: 00H
Wake_up
Cadence
Note: In this case, a command is mandatory to avoid a deadlock.
Caller_ID
VDD_OK
1
Semiconductor Group
Any signal at the line with a voltage of more than 18 V. To decode a valid ring signal, ALIS must be switched
to the Ringing Mode.
Bit
Wake_up = 0:
Wake_up = 1:
Cadence = 0:
Cadence = 1:
RING
RING = 0:
RING = 1:
Caller_ID = 0:
Caller_ID = 1:
VDD_OK = 1:
VDD_OK = 0:
7
0
Wake_up Interrupt
Cadence Interrupt
Ring Interrupt
Caller ID Interrupt
Vdd at ALIS-A Interrupt
Wake_
No Wake_up Interrupt
State)” on page 49) and a ringing signal occurs
Interrupt is generated. To clear this interrupt, the CLK_OFF bit
must be reset and ALIS-D must be supplied with a clock.
No cadence Interrupt
(time between two ring bursts is available from XR4)
(see “XR2 Extended Register 2 (Cadence Time Out)” on page 47).
No ring burst
No_auto_ring=0: this bit is set after the second valid ring burst
No_auto_ring=1: ALIS stays in sleep mode and waits for a
command. This bit represents the ring detection signal from
No caller ID preamble detected
Caller ID preamble detected
Power supply for ALIS-A is available and the connection between
ALIS-A and ALIS-D is working
No power supply for ALIS-A or no connection between ALIS-A and
ALIS-D
If CLK_OFF bit is set (see “XR6 Extended Register 6 (Power
Time between two ring bursts exceeds the programmed time
up
ALIS-A. See“CR1 Configuration Register 1 (Dialing)” on page 40.
6
dence
Ca-
5
RING
4
45
Caller
_ID
Analog Line Interface Solution
3
VDD_
OK
2
PSB 4595 / PSB 4596
Programming ALIS
1)
SI_1
, then a Wake_up
1
Data Sheet 06.98
SI_0
0

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