km29w32000ait Samsung Semiconductor, Inc., km29w32000ait Datasheet - Page 26

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km29w32000ait

Manufacturer Part Number
km29w32000ait
Description
8-bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
Table3. Device Status
RESET
The device offers a reset feature, executed by writing FFH to the command register. When the device is in Busy state during random
read, program or erase modes, the reset operation will abort these operation. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. Internal address registers are cleared to "0"s and data registers to
"1"s. The command register is cleared to wait for the next command, and the Status Register is cleared to value C0H when WP is
high. Refer to table 3 for device status after reset operation. If the device is already in reset state a new reset command will not be
accepted to by the command register. The R/B pin transitions to low for t
not necessary for normal operation. Refer to Figure 10 below.
DATA PROTECTION
The device is designed to offer protection from any involuntary program/erase during power-transitions. An internal voltage detector
disables all functions whenever Vcc is below about 2V. WP pin provides hardware protection and is recommended to be kept at V
during power-up and power-down as shown in Figure 8. The two step command sequence for program/erase provides additional
software protection.
Figure 8. AC Waveforms for Power Transition
KM29W32000AT, KM29W32000AIT
R/B
I/O
Figure 10. RESET Operation
V
WP
CC
0
~
7
Operation Mode
FFH
~ 2.5V
High
After Power-up
Read 1
t
RST
26
RST
after the Reset command is written. Reset command is
Waiting for next command
FLASH MEMORY
After Reset
~ 2.5V
IL

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