km29w040ait Samsung Semiconductor, Inc., km29w040ait Datasheet - Page 20

• Manufacturer Part Number: km29w040ait
• Description: 512k X 8 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

Table3. Device Status
READY/BUSY
R/B
I/O
The device has a R/B output that provides a hardware method of indicating the completion of a frame program, erase or read seek
completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command register or
a random read is begin after address loading. It returns to high when the internal controller has finished the operation. The pin is an
open-drain driver thereby allowing two or more R/B outputs to be Or-tied. An appropriate pull-up resister is required for proper opera-
tion and the value may be calculated by following equation.
RESET
The device offers a reset feature, executed by writing FFH to the command register. When the device is in Busy state during the
read, program or erase mode, the reset operation will abort these operation. In the case of Reset during Program or Erase opera-
tions, the contents of memory cells being altered are no longer valid, as the data will be partially programmed or erased. The device
enters the Read mode after completion of Reset operation as shown Table 3. If the device is already in reset state a new reset com-
mand will not be accepted to by the command register. The R/B pin transitions to low for t
Reset command is not necessarily for normal device operation. Refer to Figure 7 below.
KM29W040AT, KM29W040AIT
Figure 7. RESET Operation
0
~
V
7
CC
GND
Operation Mode
Device
FFH
R/B
open drain output
After Power-up
Read
where I
R/B pin.
Note*
Rp =
t
RST
20
KM29W040A ; 5.1V when Vcc=3.6V~5.5V
L
V
is the sum of the input currents of all devices tied to the
CC
(Max.) - V
I
OL
+ I
3.2V when Vcc=3.0V~3.6V
OL
L
(Max.)
RST
after the Reset command is written.
=
FLASH MEMORY
After Reset
Read
8mA + I
Note*
L