cav24c64 ON Semiconductor, cav24c64 Datasheet

no-image

cav24c64

Manufacturer Part Number
cav24c64
Description
64-kb I2c Cmos Serial Eeprom
Manufacturer
ON Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cav24c64WE-GT3
Manufacturer:
ON/安森美
Quantity:
20 000
Company:
Part Number:
cav24c64WE-GT3
Quantity:
30 000
CAV24C64
64-Kb I
EEPROM
Description
internally organized as 8192 words of 8 bits each.
(100 kHz) and Fast (400 kHz) I
CAV24C64 devices on the same bus.
Features
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 0
A
The CAV24C64 is a 64−Kb CMOS Serial EEPROM device,
It features a 32−byte page write buffer and supports the Standard
External address pins make it possible to address up to eight
and Change Control
(SCL and SDA)
Compliant
Automotive Temperature Grade 1 (−40°C to +125°C)
Supports Standard and Fast I
2.5 V to 5.5 V Supply Voltage Range
32−Byte Page Write Buffer
Hardware Write Protection for Entire Memory
CAV Prefix for Automotive and Other Applications Requiring Site
Schmitt Triggers and Noise Suppression Filters on I
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
SOIC, TSSOP 8−lead Packages
This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
2
, A
1
SCL
, A
WP
0
Figure 1. Functional Symbol
2
C CMOS Serial
CAV24C64
V
V
CC
SS
2
2
C protocol.
C Protocol
SDA
2
C Bus Inputs
1
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Pin Name
A
0
CASE 751BD
For the location of Pin 1, please consult the
corresponding package drawing.
, A
SDA
SCL
V
WP
V
W SUFFIX
CC
SS
SOIC−8
1
, A
ORDERING INFORMATION
V
A
A
A
SS
2
PIN CONFIGURATION
0
1
2
SOIC (W), TSSOP (Y)
http://onsemi.com
PIN FUNCTION
Device Address Input
Serial Data Input/Output
Serial Clock Input
Write Protect Input
Power Supply
Ground
1
Publication Order Number:
Function
CASE 948AL
TSSOP−8
Y SUFFIX
V
WP
SCL
SDA
CAV24C64/D
CC

Related parts for cav24c64

cav24c64 Summary of contents

Page 1

... CAV24C64 2 64- CMOS Serial EEPROM Description The CAV24C64 is a 64−Kb CMOS Serial EEPROM device, internally organized as 8192 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 2 (100 kHz) and Fast (400 kHz protocol. External address pins make it possible to address up to eight CAV24C64 devices on the same bus ...

Page 2

C64F AYMXXX G C64F = Specific Device Code A = Assembly Location Y = Production Year (Last Digit Production Month (1- XXX = Last Three Digits of Assembly Lot Number G = Pb−Free Package ...

Page 3

Table 4. PIN IMPEDANCE CHARACTERISTICS Symbol Parameter C (Note 4) SDA I/O Pin Capacitance IN C (Note 4) Input Capacitance (other pins (Note 5) WP Input Current WP I (Note 5) Address Input Current A (A0, A1, A2) ...

Page 4

... Device Addressing The Master addresses a Slave by creating a START condition and then broadcasting an 8-bit Slave address. For the CAV24C64, the first four bits of the Slave address are set to 1010 (Ah); the next three bits, A the logic state of the similarly named input pins. The R/W bit tells the Slave whether the Master intends to read (1) or write (0) data (Figure 3) ...

Page 5

... SCL immediately preceding the 1 (Figure 9). If the WP pin is HIGH during the strobe interval, the Slave will not acknowledge the data byte and the Write request will be rejected. Delivery State The CAV24C64 is shipped erased, i.e., all bytes are FFh http://onsemi.com 5 ...

Page 6

S BUS ACTIVITY SLAVE R MASTER ADDRESS T S SLAVE *a − a are don’t care bits SCL SDA 8th Bit Byte n BUS ACTIVITY SLAVE ADDRESS MASTER R ADDRESS BYTE T S ...

Page 7

... If, after receiving data sent by the Slave, the Master responds with ACK, then the Slave will continue transmitting until the Master responds with NoACK followed by STOP (Figure 12). During Sequential Read the internal byte address is automatically incremented up to the end of memory, where it then wraps around to the beginning of memory ...

Page 8

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 9

E1 e TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...

Page 10

... All packages are RoHS-compliant (Lead-free, Halogen-free). 10. The standard lead finish is NiPdAu. 11. The device used in the above example is a CAV24C64WE−GT3 (SOIC, Automotive Temperature, NiPdAu, Tape & Reel, 3,000/Reel). 12. For other package options, please contact your nearest ON Semiconductor Sales office. 13. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...

Related keywords