msm5412222 Oki Semiconductor, msm5412222 Datasheet

no-image

msm5412222

Manufacturer Part Number
msm5412222
Description
Msm5412222256k X 12 Field Memory
Manufacturer
Oki Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
msm5412222-30TS-K
Manufacturer:
OKI
Quantity:
346
Part Number:
msm5412222A-25TK
Manufacturer:
OKI
Quantity:
1 000
Part Number:
msm5412222A-30TSKDR1
Manufacturer:
Panasonic
Quantity:
127
Part Number:
msm5412222A-30TSKDR1
Manufacturer:
OKI
Quantity:
20 000
Part Number:
msm5412222A30TSKDR
Manufacturer:
OKI
Quantity:
1 708
Part Number:
msm5412222B
Manufacturer:
OKI
Quantity:
5 000
Part Number:
msm5412222B-20
Manufacturer:
OKI
Quantity:
20 000
Part Number:
msm5412222B-25J3-7
Manufacturer:
NDK
Quantity:
2 703
Part Number:
msm5412222B-25T3-K-7
Manufacturer:
OKI
Quantity:
20 000
Part Number:
msm5412222B-25TK
Manufacturer:
OKI
Quantity:
20 000
Part Number:
msm5412222B-30TSK
Manufacturer:
ST
0
E2L0034-17-Y1
This version: Jan. 1998
¡ Semiconductor
¡ Semiconductor
MSM5412222
Previous version: Dec. 1996
MSM5412222
262,214-Word ¥ 12-Bit Field Memory
DESCRIPTION
The OKI MSM5412222 is a high performance 3-Mbit, 256K ¥ 12-bit, Field Memory. It is especially
designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs,
VTRs, digital movies and Multi-media systems. MSM5412222 is a FRAM for wide or low end use
in general commodity TVs and VTRs exclusively. MSM5412222 is not designed for high end use
in medical systems, professional graphics systems which require long term picture storage, data
storage systems and others. Two or more MSM5412222s can be cascaded directly without any
delay devices between them. (Cascading provides larger storage depth or a longer delay).
Each of the 12-bit planes has separate serial write and read ports. These employ independent
control clocks to support asynchronous read and write operations. Different clock rates are also
supported, which allow alternate data rates between write and read data streams.
The MSM5412222 provides high speed FIFO, First-In First-Out, operation without external
refreshing: MSM5412222 refreshes its DRAM storage cells automatically, so that it appears fully
static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free
serial access operation, so that serial read and/or write control clock can be halted high or low
for any duration as long as the power is on. Internal conflicts of memory access and refreshing
operations are prevented by special arbitration logic.
The MSM5412222’s function is simple, and similar to a digital delay device whose delay-bit-
length is easily set by reset timing. The delay length, and the number of read delay clocks
between write and read, is determined by externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256 ¥ 12-bit enable high
speed first-bit-access with no clock delay just after the write or read reset timings.
Additionally, the MSM5412222 has a write mask function or input enable function (IE), and read-
data skipping function or output enable function (OE). The differences between write enable
(WE) and input enable (IE), and between read enable (RE) and output enable (OE) are that WE
and RE can stop serial write/read address increments, but IE and OE cannot stop the increment,
when write/read clocking is continuously applied to MSM5412222. The input enable (IE)
function allows the user to write into selected locations of the memory only, leaving the rest of
the memory contents unchanged. This facilitates data processing to display a “picture in picture”
on a TV screen.
The MSM5412222 is similar in operation and functionality to OKI 1-Mbit Field Memory
MSM514222B and 2-Mbit Field Memory MSM518222. Three MSM514222Bs or one MSM514222B
plus one MSM518222 can be replaced simply by one MSM5412222.
1/15

Related parts for msm5412222

msm5412222 Summary of contents

Page 1

... The OKI MSM5412222 is a high performance 3-Mbit, 256K ¥ 12-bit, Field Memory especially designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies and Multi-media systems. MSM5412222 is a FRAM for wide or low end use in general commodity TVs and VTRs exclusively. MSM5412222 is not designed for high end use in medical systems, professional graphics systems which require long term picture storage, data storage systems and others ...

Page 2

... Write mask function (Input enable control) • Data skipping function (Output enable control) • Self refresh (No refresh control is required) • Package options: 44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product : MSM5412222-xxTS-K) 40-pin 400 mil plastic SOJ PRODUCT FAMILY Family Access Time (Max ...

Page 3

... Input Enable OE Output Enable RSTW Write Reset Clock RSTR Read Reset Clock Data Input Data Output OUT V Power Supply ( Ground ( Connection pin. SS MSM5412222 OUT OUT OUT OUT ...

Page 4

... Read Buffer (¥ 12) 512 Word Serial Read Register (¥ 12) Read Line Buffer Low-Half (¥ 12) 256 (¥ 12) 71 Word Sub-Register (¥ 12) 256K (¥ 12) Memory Array 71 Word Sub-Register (¥ 12) 256 (¥ 12) Write Line Buffer Low-Half (¥ 12) 512 Word Serial Write Register (¥ 12) Data-in ...

Page 5

... DRAM array, an RSTW operation is required after the last SWCK cycle. Note that every write timing of MSM5412222 is delayed by one clock compared with read timings for easy cascading without any interface delay devices. Write Reset : RSTW The first positive transition of SWCK after RSTW becomes high resets the write address counters to zero ...

Page 6

... OE is used to enable/disable the outputs. OE high level enables the outputs. The internal read address pointer is always incremented by cycling SRCK regardless of the OE level. Note that OE setup and hold times are referenced to the rising edge of SRCK. and t ) and RE hold times (t RENS RDSS MSM5412222 and RENH 6/15 ...

Page 7

... It may be “old data” or “new” data combination of old and new data. Such a timing should be avoided. Cascade Operation The MSM5412222 is designed to allow easy cascading of multiple memory devices. This provides higher storage depth longer delay than can be achieved with only one memory device. MSM5412222 ...

Page 8

... Other Pins Tested < V < – -25 Minimum Cycle Time, Output Open -30 Input Pin = MSM5412222 Rating Unit –1 °C –55 to 150 °C Max. Unit 5 ...

Page 9

... OEZ 5 — 5 — 5 — 5 — 0 — 3 — 25 — SWC 25 — SRC MSM5412222 ( ±10 0°C to 70°C) CC MSM5412222-30 Unit Min. Max. — — — — — — — — ...

Page 10

... However, normal write is achieved in this address condition. 6. Outputs are measured with a load equivalent to 1 TTL load and 30 pF. Output reference levels are V is defined transition time that signal transfers ns 2.0 V and MSM5412222 = 3.0 V and 10/15 ...

Page 11

... SWCK t WENH WE t WWEL RSTW 0 cycle 1 cycle t t WSWH WSWL t RSTWH t SWC n 0 Disable cycle Disable cycle WDSH WDSS WENS t WWEH n MSM5412222 2 cycle 1 2 n+1 cycle n+1 11/ ...

Page 12

... T RSTR OUT RE OE n+1 cycle n+2 cycle IDSH IDSS t WIEH n 0 cycle 1 cycle t WSRH t t RSTRH WSRL t SRC t DDCK 0 1 MSM5412222 n+3 cycle IENS n+3 2 cycle 12/ ...

Page 13

... OENH OE t WOEN OUT RE RSTR disable cycle disable cycle RDSH RDSS RENS t WREH n+1 cycle n+2 cycle ODSH ODSS OENS t WOEH H i-Z MSM5412222 n+1 cycle n n+3 cycle DECK ...

Page 14

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM5412222 (Unit : mm) Package material Epoxy resin ...

Page 15

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM5412222 (Unit : mm) Package material Epoxy resin ...

Related keywords