mk60dn512zvll10 Freescale Semiconductor, Inc, mk60dn512zvll10 Datasheet - Page 49

• Manufacturer Part Number: mk60dn512zvll10
• Description: Up To 100 Mhz Arm Cortex-m4 Core With Dsp
• Manufacturer: Freescale Semiconductor, Inc

1. Typical values assume V
2. This current is a PGA module adder, in addition to and ADC conversion currents.
3. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
4. Gain = 2
5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored.
Freescale Semiconductor, Inc.
V
Symbol
SINAD
ENOB
SFDR
function of input common mode voltage (V
PP,DIFF
SNR
THD
E
IL
PGAG
Input leakage
error
Maximum
differential input
signal swing
Signal-to-noise
ratio
Total harmonic
distortion
Spurious free
dynamic range
Effective number
of bits
Signal-to-noise
plus distortion
ratio
Description
Table 30. 16-bit ADC with PGA characteristics (continued)
DDA
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
=3.0V, Temp=25°C, f
All modes
See ENOB
Conditions
• Gain=1
• Gain=64
• Gain=1
• Gain=64
• Gain=1
• Gain=64
• Gain=1, Average=4
• Gain=1, Average=8
• Gain=64, Average=4
• Gain=64, Average=8
• Gain=1, Average=32
• Gain=2, Average=32
• Gain=4, Average=32
• Gain=8, Average=32
• Gain=16, Average=32
• Gain=32, Average=32
• Gain=64, Average=32
CM
) and the PGA gain.
ADCK
Preliminary
=6MHz unless otherwise stated.
where V
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Min.
6.02 × ENOB + 1.76
Peripheral operating requirements and behaviors
X
I
= V
In
Typ.
83.0
57.5
89.4
90.0
90.9
77.0
12.3
12.7
13.3
13.1
12.5
11.8
11.1
10.2
× R
8.4
8.7
9.3
REFPGA
1
AS
× 0.583
Max.
—
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—
—
—
—
—
—
—
—
—
—
—
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Unit
mV
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
dB
dB
dB
dB
dB
dB
dB
V
mode,f
MCU's voltage
Average=32,
Average=32,
I
Average=32
(refer to the
and current
In
differential
differential
differential
differential
f
f
operating
in
in
ratings)
= leakage
current
mode,
mode,
mode,
Notes
=500Hz
=500Hz
16-bit
16-bit
16-bit
16-bit
6
in
z
=100H
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