hcts160t Intersil Corporation, hcts160t Datasheet - Page 2

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hcts160t

Manufacturer Part Number
hcts160t
Description
Radiation Hardened Synchronous Counter
Manufacturer
Intersil Corporation
Datasheet
Functional Diagram
H = HIGH voltage level.
L = LOW voltage level.
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition.
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition.
X = Immaterial.
q = Lower case letter indicate the state of the referenced output prior to the LOW-to-HIGH clock transition.
NOTES:
Reset (Clear)
Parallel Load
Count
Inhibit
1. The TC output is HIGH when TE is HIGH and the counter is at terminal count (HHHH for 161 and HLLH for 160).
2. The HIGH-to-LOW transition of PE or TE on the 54/74161 and 54/74160 should only occur while CP is high for conventional operation.
3. The LOW-to-HIGH transition of SPE on the 54/74161 and 54/74160 should only occur while CP is high for conventional operation.
SPE
MR
CP
PE
TE
OPERATING MODE
= LOW-to-HIGH clock transition.
GND
8
P0
V
3
CC
MR
D0
T0
CP
2
16
Q0
Q0
MR
P
H
H
H
H
H
L
Q3 Q0 Q3 Q0
Q0
14
TC
15
CP
X
X
X
P1
4
l (Note 2)
MR
D1
T1
CP
HCTS160T
TRUTH TABLE
PE
X
X
X
X
h
Q1
P
INPUTS
Q2 Q3
Q1
13
l (Note 2)
Q0 Q1
TE
X
X
X
X
h
P2
h (Note 3)
h (Note 3)
h (Note 3)
5
SPE
MR
D2
T2
CP
X
l
l
Q2
P
Q0
Q0
Q1
12
Q2
Pn
X
X
X
X
h
l
Q0 Q3
Count
P3
Qn
qn
qn
H
L
L
6
MR
D3
T3
CP
OUTPUTS
Q3
Q0
P
(Note 1)
(Note 1)
(Note 1)
Q1
Q3 Q3
TC
L
L
L
11

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