r8a66156sp Renesas Electronics Corporation., r8a66156sp Datasheet - Page 3

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r8a66156sp

Manufacturer Part Number
r8a66156sp
Description
24-bit I/o Expander With Led Drive Function
Manufacturer
Renesas Electronics Corporation.
Datasheet
R8A66156SP
DESCRIPTION OF OPERATION
OPERATION TIMING CHART
REJ03F0283-0100 Rev.1.00 Sep.14.2009
Page 3 of 7
CLK
D24
(1) When power ON, the status of DO and D1~D24 terminals are not determined. These terminals are
(2) By the negative edge of /CS, the status of D1~D24 terminals is loaded on shift register 1.
(3) Synchronous to the negative edge of CLK, 24-bit loaded data is serial output from the DO terminal.
(4) Synchronous to the positive edge of CLK, 24-bit serial input data from DI is write into the
(5) The 25th and following shift clock pulse are ignored and the serial data input operation is stopped.
(6) By the positive edge of /CS, input data described in (4) is output to D1~D24 terminals.
(7) Shift register 1 loads the AND tie data of external parallel input data and latched data on parallel output
(8) If the /CS is changed from "L" to "H" before reaches the 24th bit of CLK, parallel output latch latches
(9) Input/output mode set to D1~D24 terminals is done by the serial input data to the DI terminal.
DO
CS
D1
D2
DI
S
turn to high-impedance when "L" is input to the /S terminal.
shift register 2.
And the DO terminal becomes high-impedance ("High-Z").
latch.
data which has been written on shift register 2 and output it to D1~D24 terminals. Serial data after
this since is ignored and the DO terminal becomes high-impedance.
Terminals which "H" is written are set to input, and "L" is written are set to output.
High-Z
High-Z
High-Z
High-Z
(1)
(2)
1
DO1
DI1
(3)
DI1
DI2
DI24
(4)
2
DO2
DI2
3
DO3
DI3
4
DO4
DI4
5
DO5
DI5
6
DO6
DI6
1 Sequence
7
DO7
DI7
8
DO8
DI8
.
9
DO9
DI9
10
23
DO23 DO24
DI23
24
DI24
25
High-Z
(5)
(6)
DO1
DO2
DO24

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