ucn5801lw Allegro MicroSystems, Inc., ucn5801lw Datasheet
ucn5801lw
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ucn5801lw Summary of contents
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... NOTE: For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative. Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use ...
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... Outputs may be paralleled for higher load current capability. The UCN5800A is furnished in a standard 14-pin DIP; the UCN5800L and UCN5801LW in surface-mountable SOICs; the UCN5801A in a 22-pin DIP with 0.400" (10.16 mm) row centers; the UCN5801EP in a 28-lead PLCC ...
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... V DD 2.0 1.5 1.0 0.5 14-LEAD SOIC AMBIENT TEMPERATURE IN C 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1985, 2002 Allegro MicroSystems, Inc. COMMON OUT N GROUND TYPICAL BIPOLAR DRIVE Dwg. FP-016-1 22-PIN DIP C/W JA 28-LEAD PLCC C/W JA 14-PIN DIP, R ...
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Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage Input Resistance Supply Current Clamp Diode Leakage Current Clamp Diode Forward Voltage NOTE: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to ...
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AND BiMOS II LATCHED DRIVERS CLEAR STROBE ...
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STROBE OUT 1 OUT 2 OUT 3 OUT 4 OUTPUT ENABLE (ACTIVE LOW) CLEAR 14 1 STROBE ...
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AND BiMOS II LATCHED DRIVERS 14 0.280 0.240 1 0.070 0.045 0.210 MAX 0.015 MIN 0.022 0.014 14 7.11 6.10 1 1.77 1.15 5.33 MAX 0.39 MIN 0.558 0.356 NOTES: 1. Exact body and lead configuration at vendor’s ...
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NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative ...
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AND BiMOS II LATCHED DRIVERS 22 0.380 0.330 1 0.210 MAX 0.015 MIN 0.022 0.014 22 9.65 8.39 1 5.33 MAX 0.39 MIN NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead ...
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BSC 0.219 0.191 0.331 0.533 5.56 4.85 1.27 BSC 5.56 4.85 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative 0.026 0.032 0.456 ...
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AND BiMOS II LATCHED DRIVERS 24 0.2992 0.2914 0.020 1 0.013 0.0926 0.1043 0.0040 24 7.60 7.40 0.51 1 0.33 2.65 2.35 0.10 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead ...
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This page intentionally left blank 5800 5801 AND BiMOS II LATCHED DRIVERS ...
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... Internal transient-suppression diodes included for inductive-load protection. INTERFACE DRIVERS Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use ...