ppc440grx Applied Micro Circuits Corporation (AMCC), ppc440grx Datasheet - Page 78
ppc440grx
Manufacturer Part Number
ppc440grx
Description
Powerpc 440grx Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
1.PPC440GRX.pdf
(90 pages)
- Current page: 78 of 90
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440GRx – PPC440GRx Embedded Processor
Table 21. I/O Specifications—PCI, UART, IIC, SPI, Ethernet, System and Debug Interfaces (Sheet 2 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. SMIISync is a weak driver. Redrive SMIISync when driving more than one load.
3. TDO timing is referenced to the falling edge of TCK.
78
Ethernet RGMII Interface
GMC0TxClk
GMC0RxD0:3
GMC0RxCtl
GMC0TxD0:3
GMC0TxCtl
GMC1TxClk
GMC1RxD0:3
GMC1RxCtl
GMC1TxD0:3
GMC1TxCtl
Ethernet SMII Interface
SMIISync
SMII0RxD
SMII1RxD
SMII0TxD
SMII1TxD
Internal Peripheral Interface
IIC0SClk
IIC0SData
IIC1SClk
IIC1SData
SCPClkOut
SCPDI
SCPDO
UARTn_Rx
UARTn_Tx
UARTn_DCD
UARTn_DSR
UARTn_CTS
UARTn_DTR
UARTn_RI
UARTn_RTS
Interrupts Interface
IRQ0:9
JTAG Interface
TCK
TDI
TDO
TMS
TRST
Signal
Setup Time
(T
IS
1.5
1.5
2.0
2.0
1
1
1
1
5
min)
Input (ns)
Hold Time
(T
IH
1.5
5.5
5.5
1
1
1
1
1
1
min)
Valid Delay
(T
OV
0.5
0.5
0.5
0.5
9.5
3
3
3
5
5
6
max)
Output (ns)
Hold Time
(T
OH
3.5
3.5
3.5
3.5
1.0
1
1
1
0
0
0
min)
(minimum)
Output Current (mA)
I/O H
27.7
19.1
19.1
19.1
19.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
5.1
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
5.1
5.1
Preliminary Data Sheet
(minimum)
Revision 1.11 – July 22, 2008
I/O L
12.8
12.8
12.8
12.8
12.8
12.8
10.2
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
6.8
n/a
8.7
n/a
n/a
n/a
8.7
n/a
8.7
n/a
n/a
n/a
8.7
n/a
n/a
GMC0RxClk
GMC0RxClk
GMC1RxClk
GMC1RxClk
GMC0TxClk
GMC0TxClk
GMC1TxClk
GMC1TxClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
SCPClkOut
SCPClkOut
IIC1SClk
40MHz
Clock
AMCC Proprietary
Notes
async
async
async
async
async
async
async
async
async
async
async
async
Max
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