ace24c1024 ACE Technology Co., LTD., ace24c1024 Datasheet - Page 8

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ace24c1024

Manufacturer Part Number
ace24c1024
Description
Two-wire Serial Eeprom
Manufacturer
ACE Technology Co., LTD.
Datasheet
 
                                                                                                                                                             
                                             
Device Addressing
the chip for a read or write operation (refer to Figure 7).
significant bits as shown. This is common to all the EEPROM devices.
the same bus. These bits must compare to their corresponding hard-wired input pins. The A2,A1 pins
use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float.
bit is the most significant bit of the data word address that follows.
this bit is high and a write operation is initiated if this bit is low.
device will return to a standby state.
Noise protection:
device.
Date Security:
memory when the WP pin is at Vcc.
The 1024K EEPROM device require an 8-bit device address word following a start condition to enable
The device address word consists of a mandatory one, zero sequence for the first four most
The 1024K EEPROM use the three device address bits A2, A1 to allow as many as eight devices on
The seventh bit (P
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the
Special internal circuitry place on the SDA and SCL pins prevent small noise spikes from activating the
The ACE24C1024 has a hardware data protect scheme that slows the user to write protect the entire
0
) of the device address is a memory page address bit. This memory page address
Figure 6.Output Acknowledge
Technology
Figure 5.Start and Stop Definition
Two-wire Serial EEPROM
ACE24C1024
VER 1.3
8

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