hys64d64020gbdl-5-c Qimonda, hys64d64020gbdl-5-c Datasheet - Page 4

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hys64d64020gbdl-5-c

Manufacturer Part Number
hys64d64020gbdl-5-c
Description
200-pin Small Outline Dual -in-line Memory Modules
Manufacturer
Qimonda
Datasheet
1.2
The HYS64D64020HBDL–5–C and HYS64D64020GBDL–5–
C are industry standard 200-Pin Small Outline Dual-In-Line
Memory Modules (SO-DIMMs) organized as 64M ×64. The
memory array is designed with Double Data Rate
Synchronous DRAMs (DDR SDRAM). A variety of decoupling
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Notes
1. All part numbers end with a place code designating the silicon-die revision. Reference information available on request.
2. The Compliance Code is printed on the module labels describing the speed sort (for example “PC2700”), the latencies and
1) RCD: Row-Column-Delay
Rev. 1.21, 2007-01
03292006-F1IB-1I3E
Type
PC3200 (CL=3.0)
HYS64D64020GBDL–5–C
PC2700 (CL=2.5)
HYS64D64020GBDL–6–C
Product Type
PC3200 (CL=3.0)
HYS64D64020HBDL–5–C
PC2700 (CL=2.5)
HYS64D64020HBDL–6–C
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Example: HYS64D32020GDL-6-B, indicating rev. B dies are used for SDRAM components.
SPD code definition (for example “2033–0” means CAS latency of 2.0 clocks, RCD
latency of 3 clocks, and JEDEC SPD code definiton version 0), and the Raw Card used for this module.
1)
Description
Compliance Code
PC3200S–3033–1–Z
PC2700S–2533–0–Z
Compliance Code
PC3200S–3033–1–Z
PC2700S–2533–0–Z
4
Description
Two ranks 512 MB SO-DIMM
Two ranks 512 MB SO-DIMM
Ordering Information for RoHS Compliant Products
capacitors are mounted on the PC board. The DIMMs feature
serial presence detect based on a serial E
using the 2-pin I
programmed with configuration data and the second
128 bytes are available to the customer.
Description
Two ranks 512 MB SO-DIMM
Two ranks 512 MB SO-DIMM
Small Outline DDR SDRAM Modules
2
C protocol. The first 128 bytes are
1)
HYS64D64020[H/G]BDL–[5/6]–C
latency of 3 clocks, Row Precharge
SDRAM Technology
32 MBit (×8)
32 MBit (×8)
Ordering Information
Internet Data Sheet
SDRAM
Technology
32 MBit (×8)
32 MBit (×8)
TABLE 2
TABLE 3
2
PROM device

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