hys64t256022edl Qimonda, hys64t256022edl Datasheet - Page 27
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hys64t256022edl
Manufacturer Part Number
hys64t256022edl
Description
200-pin Dual Small-outline-ddr2-sdram Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T256022EDL.pdf
(40 pages)
1) ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Rev. 1.0, 2006-11
11172006-DXYK-2PPW
Symbol
t
t
t
t
t
t
t
t
AOND
AON
AONPD
AOFD
AOF
AOFPD
ANPD
AXPD
the ODT resistance is fully on. Both are measured from
10 ns (= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if
Both are measured from
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if
Parameter / Condition
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
ODT to Power Down Mode Entry Latency
ODT Power Down Exit Latency
t
AOFD
. Both are measured from
ODT AC Character. and Operating Conditions for DDR2-533
t
t
AOND
AOFD
, which is interpreted differently per speed bin. For DDR2-400/533,
, which is interpreted differently per speed bin. For DDR2-400/533,
Values
Min.
2
t
t
2.5
t
t
3
8
AC.MIN
AC.MIN
AC.MIN
AC.MIN
27
+ 2 ns
+ 2 ns
t
CK
= 5 ns.
t
CK
= 5 ns.
Max.
2
t
2
2.5
t
2.5
—
—
HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B
AC.MAX
AC.MAX
t
CK +
t
CK +
Small Outline DDR2 SDRAM Modules
t
+ 1 ns
AC.MAX
+ 0.6 ns
t
AC.MAX
+ 1 ns
+ 1 ns
Unit
t
ns
ns
t
ns
ns
t
t
Internet Data Sheet
CK
CK
CK
CK
TABLE 19
Note
1)
2)
t
t
AOND
AOFD
is
is