hys64t128021edl-25fb2 Qimonda, hys64t128021edl-25fb2 Datasheet - Page 11

no-image

hys64t128021edl-25fb2

Manufacturer Part Number
hys64t128021edl-25fb2
Description
200-pin So-dimm Ddr2 Sdram Modules Ddr2 Sdram
Manufacturer
Qimonda
Datasheet
Rev. 1.20, 2008-06
08212006-PKYN-2H1B
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tri-state, and
allows multiple devices to share as a wire-OR.
11
HYS64T[64/128]02xEDL–[25F/2.5/3S](–)B2
Small Outlined DDR2 SDRAM Modules
Abbreviations for Buffer Type
Abbreviations for pin Type
Internet Data Sheet
TABLE 6
TABLE 7

Related parts for hys64t128021edl-25fb2