hys64t128020hm-5-a Infineon Technologies Corporation, hys64t128020hm-5-a Datasheet - Page 5
![no-image](/images/no-image-200.jpg)
hys64t128020hm-5-a
Manufacturer Part Number
hys64t128020hm-5-a
Description
214-pin Micro-dimm-ddr2-sdram Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
1.HYS64T128020HM-5-A.pdf
(37 pages)
214-Pin Micro-DIMM-DDR2-SDRAM Modules
MDIMM
1
This chapter gives an overview of the 214-Pin Micro-DIMM-DDR2-SDRAM Modules product family and describes
its main characteristics.
1.1
List of Micro-DIMM features
•
•
•
•
Table 1
Product Type Speed Code
Speed Grade
max. Clock Frequency
min. RAS-CAS-Delay
min. Row Precharge Time
min. Row Active Time
min. Row Cycle Time
1.2
The INFINEON HYS64T128020HM–[3.7/5]–A module
family are low profile Unbuffered Micro-DIMM modules
“MDIMMs” with 30,0 mm height based on DDR2
technology. DIMMs are available as 128M
organisation and density, intended for mounting into
214-pin mezzanine connector sockets.
are write protected; the second 128 bytes are available
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic
Data Sheet
214-Pin PC2-4200 and PC2-3200 DDR2 SDRAM
memory modules for use as main memory when
installed in systems such as mobile personal
computers.
128M
organisation
JEDEC standard Double-Data-Rate-Two
Synchronous DRAMs (DDR2 SDRAM) with a single
+ 1.8 V (± 0.1 V) power supply
Built with 1 Gb DDR2 SDRAMs in P-TFBGA-92
chipsize packages
equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January
2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and
polybrominated biphenyl ethers.
64 module organisation and 64M 16 chip
Overview
Features
Performance for DDR2-533 and DDR2-400
Description
@CL5
@CL4
@CL3
f
f
f
t
t
t
t
CK5
CK4
CK3
RCD
RP
RAS
RC
64
–3.7
PC2–4200 4–4–4
266
266
200
15
15
45
60
5
•
•
•
•
•
•
•
•
The memory array is designed with 1 Gb Double-Data-
Rate-Two (DDR2) Synchronous DRAMs. Decoupling
capacitors are mounted on the PCB board. The DIMMs
feature serial presence detect based on a serial
E
128 bytes are programmed with configuration data and
to the customer.
2
PROM device using the 2-pin I
Programmable CAS Latencies (3, 4 and 5), Burst
Length (8 & 4) and Burst Type
Burst Refresh, Distributed Refresh and Self Refresh
All inputs and outputs SSTL_18 compatible
OCD (Off-Chip Driver Impedance Adjustment) and
ODT (On-Die Termination)
Serial Presence Detect with E
Micro-DIMM Dimensions (nominal): 30 mm high,
54.0 mm wide
Based on JEDEC standard reference layouts Raw
Card “B”
RoHS compliant product
–5
PC2–3200 3–3–3
200
200
200
15
15
40
55
HYS64T128020HM–3.7–A
HYS64T128020HM–5–A
1)
04132004-S0LP-CL4Q
2
2
PROM
C protocol. The first
Rev. 1.2, 2005-08
Units
—
MHz
MHz
MHz
ns
ns
ns
ns