hys64t128020edl Qimonda, hys64t128020edl Datasheet - Page 3
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hys64t128020edl
Manufacturer Part Number
hys64t128020edl
Description
200-pin Small-outlined Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T128020EDL.pdf
(43 pages)
1
This chapter gives an overview of the 200-pin small-outline DDR2 SDRAM modules product family and describes its main
characteristics.
1.1
• 200-Pin PC2-6400, PC2-5300 and PC2-4200 DDR2
• 128Mx64 module organization, and 64Mx16 chip
• 1GB Modules built with 1 Gbit DDR2 SDRAMs in PG-
• Standard Double-Data-Rate-Two Synchronous DRAMs
• All speed grades faster than DDR2-400 comply with
• Programmable CAS Latencies (3, 4, 5 ), Burst Length (8 &
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 1.12, 2007-10
10312006-I253-V1V0
QAG Speed Code
DRAM Speed Grade
Module Speed Grade
CAS-RCD-RP latencies
Max. Clock Frequency
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
SDRAM memory modules.
organization
TFBGA-84-11 chipsize packages
(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power
supply
DDR2-400 timing specifications.
4).
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Features
Overview
CL3
CL4
CL5
CL6
DDR2
PC2
f
f
f
f
t
t
t
t
CK3
CK4
CK5
CK6
RCD
RP
RAS
RC
–800E
6–6–6
–2.5
–6400E
200
266
333
400
15
15
45
60
3
• Auto Refresh (CBR) and Self Refresh
• Auto Refresh for temperatures above 85 °C
• Programmable self refresh rate via EMRS2 setting.
• Programmable partial array refresh via EMRS2 settings.
• DCC enabling via EMRS2 setting.
• All inputs and outputs SSTL_1.8 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die
• Serial Presence Detect with E
• SO-DIMM Dimensions (nominal): 50 mm42 mm30 mm
• Based on standard reference layouts Raw Cards 'A'
• RoHS compliant products
Termination (ODT)
high, 67.6 mm wide
–667C
–5300C
4–4–4
200
333
333
–
12
12
45
57
–3
Small Outlined DDR2 SDRAM Modules
HYS64T128020EDL–[2.5/3S/3.7]–B
1)
–3.7
–533C
–4200C
4–4–4
200
266
266
–
15
15
45
60
2
PROM
Performance Table
Internet Data Sheet
TABLE 1
Unit
t
MHz
MHz
MHz
MHz
ns
ns
ns
ns
t
CK
REFI
= 3.9 µs.