m464s3254jls Samsung Semiconductor, Inc., m464s3254jls Datasheet - Page 10

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m464s3254jls

Manufacturer Part Number
m464s3254jls
Description
Sdram Unbuffered Sodimm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
11.0 DC CHARACTERISTICS
11.1 M464S3254JLS (32M x 64, 256MB Module)
11.2 M464S6453J60 (64M x64, 512MB Module)
Note :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing level is CMOS(V
256MB, 512MB Unbuffered SODIMM
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
Operating current
(Burst mode)
Refresh current
Self refresh current
Parameter
Parameter
Symbol
Symbol
I
I
I
I
I
I
I
I
CC2
CC3
CC2
CC3
I
CC2
I
I
CC3
I
I
CC2
I
I
CC3
I
CC2
CC3
CC2
CC3
I
CC2
CC3
I
I
I
I
CC2
CC3
I
I
I
CC1
CC4
CC5
CC6
CC1
CC4
CC5
CC6
PS
NS
PS
NS
PS
NS
PS
NS
P
N
P
N
P
N
P
N
Burst length = 1, tRC ≥ tRC(min), IO = 0 mA
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
IO = 0 mA,
Page burst 4Banks activated tCCD = 2CLKs
tRC ≥ tRC(min)
CKE ≤ 0.2V
Burst length = 1, tRC ≥ tRC(min), IO = 0 mA
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
CKE ≤ V
CKE & CLK ≤ V
CKE ≥ V
Input signals are changed one time during 20ns
CKE ≥ V
Input signals are stable
IO = 0 mA,
Page burst 4Banks activated tCCD = 2CLKs
tRC ≥ tRC(min)
CKE ≤ 0.2V
IH
/V
IL
IL
IH
IH
IL
IH
IH
IL
IH
IH
IL
IH
IH
=V
(max), tCC = 10ns
(max), tCC = 10ns
(max), tCC = 10ns
(max), tCC = 10ns
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
(min), CS ≥ V
(min), CLK ≤ V
DDQ
(Recommended operating condition unless otherwise noted, T
(Recommended operating condition unless otherwise noted, T
/V
IL
IL
IL
IL
Test Condition
Test Condition
(max), tCC =∞
(max), tCC =∞
(max), tCC =∞
(max), tCC =∞
SSQ
10 of 15
)
IH
IH
IH
IH
IL
IL
IL
IL
(min), tCC = 10ns
(min), tCC = 10ns
(min), tCC = 10ns
(min), tCC = 10ns
(max), tCC =∞
(max), tCC =∞
(max), tCC =∞
(max), tCC =∞
C
C
L
L
Version
Version
Rev. 1.1 August 2008
1,104
1,504
392
120
224
160
552
752
784
240
160
448
320
7A
7A
16
16
80
40
40
24
12
32
32
80
80
48
24
Unit
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
SDRAM
A
A
= 0 to 70°C)
= 0 to 70°C)
Note
Note
1
1
2
1
1
2

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